Inventor · disambiguated record
Burkhard Ludwig
Also filed as: LUDWIG BURKHARD
12 granted patents·3 pending applications·344 citations·filing 1998–2007
91Inventor score
Files withINFINEON TECHNOLOGIES AG10QIMONDA AG2KOEFFERLEIN MATTHIAS1KOHLE RODERICK1NOELSCHER CHRISTOPH1
Top patents by PatentIndex Score
15 records- 0198US7665051B2Method and device for classifying cells in a layout into a same environment and their use for checking the layout of an electronic circuitQIMONDA AG·Filed 2007·Granted Feb 16, 2010·223 cites·16 claims
- 0284US6730463B2Method for determining and removing phase conflicts on alternating phase masksINFINEON TECHNOLOGIES AG·Filed 2002·Granted May 4, 2004·29 cites·5 claims
- 0384US6543045B2Method for detecting and automatically eliminating phase conflicts on alternating phase masksINFINEON TECHNOLOGIES AG·Filed 2001·Granted Apr 1, 2003·27 cites·6 claims
- 0480US6660437B2Alternating phase maskINFINEON TECHNOLOGIES AG·Filed 2002·Granted Dec 9, 2003·22 cites·16 claims
- 0573US7759242B2Method of fabricating an integrated circuitQIMONDA AG·Filed 2007·Granted Jul 20, 2010·4 cites·34 claims
- 0672US6680151B2Alternating phase maskINFINEON TECHNOLOGIES AG·Filed 2002·Granted Jan 20, 2004·14 cites·7 claims
- 0770US6957414B2Method for determining the ability to project images of integrated semiconductor circuits onto alternating phase masksINFINEON TECHNOLOGIES AG·Filed 2003·Granted Oct 18, 2005·11 cites·14 claims
- 0862US6981241B2Method for eliminating phase conflict centers in alternating phase masks, and method for producing alternating phase masksINFINEON TECHNOLOGIES AG·Filed 2003·Granted Dec 27, 2005·7 cites·18 claims
- 0959US6493865B2Method of producing masks for fabricating semiconductor structuresINFINEON TECHNOLOGIES AG·Filed 2001·Granted Dec 10, 2002·6 cites·12 claims
- 1046US6834377B2Method for checking an integrated electrical circuitINFINEON TECHNOLOGIES AG·Filed 2003·Granted Dec 21, 2004·1 cites·44 claims
- 1142US2007283306A1Layout cells, layout cell arrangement, method of generating a layout cell, method of generating a layout cell arrangement, computer program productsKOEFFERLEIN MATTHIAS·Filed 2006·Application pending·0 cites
- 1238US2006190850A1Method for optimizing the geometry of structural elements of a circuit design pattern and method for producing a photomaskKOHLE RODERICK·Filed 2006·Application pending·0 cites
- 1338US2009127722A1Method for Processing a Spacer Structure, Method of Manufacturing an Integrated Circuit, Semiconductor Device and Intermediate Structure with at Least One Spacer StructureNOELSCHER CHRISTOPH·Filed 2007·Application pending·0 cites
- 1436US7354683B2Lithography mask for imaging of convex structuresINFINEON TECHNOLOGIES AG·Filed 2004·Granted Apr 8, 2008·0 cites·30 claims
- 1529US6913983B1Integrated circuit arrangement and method for the manufacture thereofINFINEON TECHNOLOGIES AG·Filed 1998·Granted Jul 5, 2005·0 cites·11 claims
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Identity basis: PatentsView inventor disambiguation (2025Q4-odp release). How scoring works →