Inventor · disambiguated record
C. John Glossner
Also filed as: GLOSSNER C JOHN
41 granted patents·2 pending applications·657 citations·filing 1998–2016
98Inventor score
Technology areasG06F
Files withOPTIMUM SEMICONDUCTOR TECH INC16SANDBRIDGE TECHNOLOGIES INC13HOKENEK ERDEM6AGERE SYST GUARDIAN CORP5LUCENT TECHNOLOGIES INC2
Top patents by PatentIndex Score
43 records- 0196US10339095B2Vector processor configured to operate on variable length vectors using digital signal processing instructionsOPTIMUM SEMICONDUCTOR TECH INC·Filed 2015·Granted Jul 2, 2019·18 cites·22 claims
- 0292US9959246B2Vector processor configured to operate on variable length vectors using implicitly typed instructionsOPTIMUM SEMICONDUCTOR TECH INC·Filed 2015·Granted May 1, 2018·6 cites·32 claims
- 0391US7475222B2Multi-threaded processor having compound instruction and operation formatsSANDBRIDGE TECHNOLOGIES INC·Filed 2005·Granted Jan 6, 2009·26 cites·12 claims
- 0490US8074051B2Multithreaded processor with multiple concurrent pipelines per threadHOKENEK ERDEM·Filed 2005·Granted Dec 6, 2011·17 cites·29 claims
- 0590US7797363B2Processor having parallel vector multiply and reduce operations with sequential semanticsSANDBRIDGE TECHNOLOGIES INC·Filed 2005·Granted Sep 14, 2010·24 cites·21 claims
- 0690US6842848B2Method and apparatus for token triggered multithreadingSANDBRIDGE TECHNOLOGIES INC·Filed 2002·Granted Jan 11, 2005·65 cites·16 claims
- 0789US9910824B2Vector processor configured to operate on variable length vectors using instructions to combine and split vectorsOPTIMUM SEMICONDUCTOR TECH INC·Filed 2015·Granted Mar 6, 2018·4 cites·22 claims
- 0888US10169039B2Computer processor that implements pre-translation of virtual addressesOPTIMUM SEMICONDUCTOR TECH INC·Filed 2016·Granted Jan 1, 2019·5 cites·46 claims
- 0987US6904511B2Method and apparatus for register file port reduction in a multithreaded processorSANDBRIDGE TECHNOLOGIES INC·Filed 2002·Granted Jun 7, 2005·50 cites·20 claims
- 1084US7593978B2Processor reduction unit for accumulation of multiple operands with or without saturationSANDBRIDGE TECHNOLOGIES INC·Filed 2004·Granted Sep 22, 2009·41 cites·17 claims
- 1183US10908909B2Processor with mode supportOPTIMUM SEMICONDUCTOR TECH INC·Filed 2016·Granted Feb 2, 2021·4 cites·21 claims
- 1283US10824586B2Vector processor configured to operate on variable length vectors using one or more complex arithmetic instructionsOPTIMUM SEMICONDUCTOR TECH INC·Filed 2015·Granted Nov 3, 2020·2 cites·42 claims
- 1383US6990557B2Method and apparatus for multithreaded cache with cache eviction based on thread identifierSANDBRIDGE TECHNOLOGIES INC·Filed 2002·Granted Jan 24, 2006·38 cites·15 claims
- 1482US11544214B2Monolithic vector processor configured to operate on variable length vectors using a vector length registerOPTIMUM SEMICONDUCTOR TECH INC·Filed 2015·Granted Jan 3, 2023·2 cites·38 claims
- 1582US7251737B2Convergence device with dynamic program throttling that replaces noncritical programs with alternate capacity programs based on power indicatorSANDBRIDGE TECHNOLOGIES INC·Filed 2003·Granted Jul 31, 2007·53 cites·19 claims
- 1680US9792116B2Computer processor that implements pre-translation of virtual addresses with target registersOPTIMUM SEMICONDUCTOR TECH INC·Filed 2016·Granted Oct 17, 2017·2 cites·46 claims
- 1780US6968445B2Multithreaded processor with efficient processing for convergence device applicationsSANDBRIDGE TECHNOLOGIES INC·Filed 2002·Granted Nov 22, 2005·29 cites·19 claims
- 1880US6925643B2Method and apparatus for thread-based memory access in a multithreaded processorSANDBRIDGE TECHNOLOGIES INC·Filed 2002·Granted Aug 2, 2005·28 cites·14 claims
- 1977US8892849B2Multithreaded processor with multiple concurrent pipelines per threadHOKENEK ERDEM·Filed 2009·Granted Nov 18, 2014·5 cites·21 claims
- 2077US7349938B2Arithmetic circuit with balanced logic levels for low-power operationSANDBRIDGE TECHNOLOGIES INC·Filed 2005·Granted Mar 25, 2008·8 cites·20 claims
- 2175US7428567B2Arithmetic unit for addition or subtraction with preliminary saturation detectionSANDBRIDGE TECHNOLOGIES INC·Filed 2004·Granted Sep 23, 2008·20 cites·25 claims
- 2274US6912623B2Method and apparatus for multithreaded cache with simplified implementation of cache replacement policySANDBRIDGE TECHNOLOGIES INC·Filed 2002·Granted Jun 28, 2005·20 cites·15 claims
- 2373US10339094B2Vector processor configured to operate on variable length vectors with asymmetric multi-threadingOPTIMUM SEMICONDUCTOR TECH INC·Filed 2015·Granted Jul 2, 2019·1 cites·23 claims
- 2473US9558000B2Multithreading using an ordered list of hardware contextsOPTIMUM SEMICONDUCTOR TECH INC·Filed 2014·Granted Jan 31, 2017·3 cites·24 claims
- 2572US9940129B2Computer processor with register direct branches and employing an instruction preload structureOPTIMUM SEMICONDUCTOR TECH INC·Filed 2016·Granted Apr 10, 2018·1 cites·26 claims
- 2672US9766894B2Method and apparatus for enabling a processor to generate pipeline control signalsOPTIMUM SEMICONDUCTOR TECH INC·Filed 2014·Granted Sep 19, 2017·3 cites·26 claims
- 2767US8762688B2Multithreaded processor with multiple concurrent pipelines per threadHOKENEK ERDEM·Filed 2011·Granted Jun 24, 2014·1 cites·20 claims
- 2863US6260189B1Compiler-controlled dynamic instruction dispatch in pipelined processorsLUCENT TECHNOLOGIES INC·Filed 1998·Granted Jul 10, 2001·43 cites·24 claims
- 2960US10846259B2Vector processor to operate on variable length vectors with out-of-order executionOPTIMUM SEMICONDUCTOR TECH INC·Filed 2015·Granted Nov 24, 2020·0 cites·63 claims
- 3059US10922267B2Vector processor to operate on variable length vectors using graphics processing instructionsOPTIMUM SEMICONDUCTOR TECH INC·Filed 2015·Granted Feb 16, 2021·0 cites·14 claims
- 3156US10514915B2Computer processor with address register fileOPTIMUM SEMICONDUCTOR TECH INC·Filed 2016·Granted Dec 24, 2019·0 cites·46 claims
- 3256US8959315B2Multithreaded processor with multiple concurrent pipelines per threadHOKENEK ERDEM·Filed 2009·Granted Feb 17, 2015·0 cites·29 claims
- 3356US8918627B2Multithreaded processor with multiple concurrent pipelines per threadHOKENEK ERDEM·Filed 2009·Granted Dec 23, 2014·0 cites·19 claims
- 3452US6282585B1Cooperative interconnection for reducing port pressure in clustered microprocessorsAGERE SYST GUARDIAN CORP·Filed 1999·Granted Aug 28, 2001·25 cites·22 claims
- 3552US6230251B1File replication methods and apparatus for reducing port pressure in a clustered processorAGERE SYST GUARDIAN CORP·Filed 1999·Granted May 8, 2001·25 cites·16 claims
- 3651US9766895B2Opportunity multithreading in a multithreaded processor with instruction chaining capabilityOPTIMUM SEMICONDUCTOR TECH INC·Filed 2014·Granted Sep 19, 2017·0 cites·22 claims
- 3751US6079010AMultiple machine view execution in a computer systemLUCENT TECHNOLOGIES INC·Filed 1998·Granted Jun 20, 2000·24 cites·24 claims
- 3849US6256725B1Shared datapath processor utilizing stack-based and register-based storage spacesAGERE SYST GUARDIAN CORP·Filed 1998·Granted Jul 3, 2001·21 cites·23 claims
- 3947US6317821B1Virtual single-cycle execution in pipelined processorsAGERE SYST GUARDIAN CORP·Filed 1998·Granted Nov 13, 2001·20 cites·23 claims
- 4046US6269437B1Duplicator interconnection methods and apparatus for reducing port pressure in a clustered processorAGERE SYST GUARDIAN CORP·Filed 1999·Granted Jul 31, 2001·18 cites·19 claims
- 4145US2010299319A1Method, apparatus, and architecture for automated interaction between subscribers and entitiesSANDBRIDGE TECHNOLOGIES INC·Filed 2008·Application pending·0 cites
- 4243US2009276432A1Data file storing multiple data types with controlled data accessHOKENEK ERDEM·Filed 2005·Application pending·0 cites
- 4333US6859871B1Method and apparatus for reducing power consumption in a pipelined processorAGERE SYSTEMS INC·Filed 1998·Granted Feb 22, 2005·5 cites·20 claims
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Identity basis: PatentsView inventor disambiguation (2025Q4-odp release). How scoring works →