Inventor · disambiguated record
Christian Caillat
Also filed as: CAILLAT CHRISTIAN · CAILLAT CHRISTIAN MARC BENOIT
19 granted patents·4 pending applications·539 citations·filing 2000–2025
93Inventor score
Files withMICRON TECHNOLOGY INC14IMEC3COMMISSARIAT ENERGIE ATOMIQUE1INTEL CORP1ST MICROELECTRONICS CROLLES 21
Top patents by PatentIndex Score
23 records- 0195US11778806B2Memory device having 2-transistor vertical memory cell and separate read and write gatesMICRON TECHNOLOGY INC·Filed 2021·Granted Oct 3, 2023·2 cites·18 claims
- 0295US9076726B2Method for tuning the effective work function of a gate structure in a semiconductor deviceIMEC·Filed 2013·Granted Jul 7, 2015·415 cites·14 claims
- 0391US10346088B2Method and apparatus for per-deck erase verify and dynamic inhibit in 3d NANDINTEL CORP·Filed 2017·Granted Jul 9, 2019·11 cites·20 claims
- 0489US6562687B1MIS transistor and method for making same on a semiconductor substrateCOMMISSARIAT ENERGIE ATOMIQUE·Filed 2000·Granted May 13, 2003·89 cites·7 claims
- 0579US8748959B2Semiconductor memory deviceVAN BUSKIRK MICHAEL A·Filed 2010·Granted Jun 10, 2014·5 cites·22 claims
- 0676US8518793B2Oxygen diffusion barrier comprising RuIMEC·Filed 2012·Granted Aug 27, 2013·3 cites·20 claims
- 0774US12219750B2Memory device having 2-transistor vertical memory cell and separate read and write gatesMICRON TECHNOLOGY INC·Filed 2023·Granted Feb 4, 2025·0 cites·20 claims
- 0873US10147494B2Apparatus configured to program memory cells using an intermediate level for multiple data statesMICRON TECHNOLOGY INC·Filed 2018·Granted Dec 4, 2018·2 cites·20 claims
- 0972US9245759B2Method for manufacturing a dual work function semiconductor deviceIMEC·Filed 2013·Granted Jan 26, 2016·4 cites·20 claims
- 1071US9633719B2Programming memory cells to be programmed to different levels to an intermediate level from a lowest levelMICRON TECHNOLOGY INC·Filed 2015·Granted Apr 25, 2017·2 cites·21 claims
- 1171US2025174262A1Refresh determination using memory cell patternsMICRON TECHNOLOGY INC·Filed 2025·Application pending·0 cites
- 1269US12236992B2Refresh determination using memory cell patternsMICRON TECHNOLOGY INC·Filed 2022·Granted Feb 25, 2025·0 cites·21 claims
- 1367US9779829B2Erasing memory segments in a memory block of memory cells using select gate control line voltagesMICRON TECHNOLOGY INC·Filed 2015·Granted Oct 3, 2017·2 cites·25 claims
- 1465US9953718B2Programming memory cells to be programmed to different levels to an intermediate level from a lowest levelMICRON TECHNOLOGY INC·Filed 2017·Granted Apr 24, 2018·1 cites·34 claims
- 1564US9093311B2Techniques for providing a semiconductor memory deviceMICRON TECHNOLOGY INC·Filed 2014·Granted Jul 28, 2015·1 cites·23 claims
- 1657US7994560B2Integrated circuit comprising a transistor and a capacitor, and fabrication methodST MICROELECTRONICS CROLLES 2·Filed 2008·Granted Aug 9, 2011·1 cites·23 claims
- 1752US10504600B2Apparatus configured to program memory cells using an intermediate level for multiple data statesMICRON TECHNOLOGY INC·Filed 2018·Granted Dec 10, 2019·0 cites·20 claims
- 1850US2024185926A1Writing user data into storage memoryMICRON TECHNOLOGY INC·Filed 2023·Application pending·0 cites
- 1947US12288592B2Performing sense operations in memoryMICRON TECHNOLOGY INC·Filed 2022·Granted Apr 29, 2025·0 cites·20 claims
- 2046US10153049B2Erasing memory segments in a memory block of memory cells using select gate control line voltagesMICRON TECHNOLOGY INC·Filed 2017·Granted Dec 11, 2018·0 cites·24 claims
- 2145US7008842B2Process for fabricating a component, such as a capacitor in an integrated circuit, and integrated-circuit componentST MICROELECTRONICS SA·Filed 2002·Granted Mar 7, 2006·1 cites·14 claims
- 2245US2023395147A1Forward-looking determination of read voltage using memory cell patternsMICRON TECHNOLOGY INC·Filed 2022·Application pending·0 cites
- 2332US2004262638A1Integrated circuit with dram memory cellFiled 2002·Application pending·0 cites
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Identity basis: PatentsView inventor disambiguation (2025Q4-odp release). How scoring works →