Inventor · disambiguated record
Chiaming Chai
Also filed as: CHAI CHIAMING
28 granted patents·3 pending applications·219 citations·filing 2000–2023
96Inventor score
Top patents by PatentIndex Score
31 records- 0191US6385071B1Redundant scheme for CAMRAM memory arrayIBM·Filed 2001·Granted May 7, 2002·65 cites·18 claims
- 0286US8008961B2Adaptive clock generators, systems, and methodsQUALCOMM INC·Filed 2009·Granted Aug 30, 2011·13 cites·23 claims
- 0383US6658610B1Compilable address magnitude comparator for memory array self-testingIBM·Filed 2000·Granted Dec 2, 2003·23 cites·13 claims
- 0482US8638153B2Pulse clock generation logic with built-in level shifter and programmable rising edge and pulse widthGE SHAOPING·Filed 2012·Granted Jan 28, 2014·9 cites·21 claims
- 0580US6452822B1Segmented match line arrangement for content addressable memoryIBM·Filed 2001·Granted Sep 17, 2002·29 cites·30 claims
- 0679US7073112B2Compilable address magnitude comparator for memory array self-testingIBM·Filed 2003·Granted Jul 4, 2006·19 cites·6 claims
- 0768US7961499B2Low leakage high performance static random access memory cell using dual-technology transistorsQUALCOMM INC·Filed 2009·Granted Jun 14, 2011·5 cites·19 claims
- 0868US7952901B2Content addressable memoryQUALCOMM INC·Filed 2007·Granted May 31, 2011·4 cites·34 claims
- 0967US8456929B2Circuits, systems, and methods for dynamic voltage level shiftingLILES STEPHEN EDWARD·Filed 2010·Granted Jun 4, 2013·4 cites·24 claims
- 1067US7616468B2Method and apparatus for reducing power consumption in a content addressable memoryQUALCOMM INC·Filed 2006·Granted Nov 10, 2009·5 cites·20 claims
- 1166US9911472B1Write bitline driver for a dual voltage domainQUALCOMM INC·Filed 2016·Granted Mar 6, 2018·2 cites·27 claims
- 1266US7242600B2Circuit and method for subdividing a CAMRAM bank by controlling a virtual groundQUALCOMM INC·Filed 2005·Granted Jul 10, 2007·6 cites·21 claims
- 1365US7586772B2Method and apparatus for aborting content addressable memory search operationsQUALCOMM INC·Filed 2006·Granted Sep 8, 2009·5 cites·6 claims
- 1464US7761774B2High speed CAM lookup using stored encoded keyQUALCOMM INC·Filed 2005·Granted Jul 20, 2010·5 cites·27 claims
- 1561US6816396B2Apparatus for detecting multiple hits in a CAMRAM memory arrayIBM·Filed 2003·Granted Nov 9, 2004·11 cites·14 claims
- 1660US9608637B2Dynamic voltage level shifters employing pulse generation circuits, and related systems and methodsQUALCOMM INC·Filed 2015·Granted Mar 28, 2017·1 cites·27 claims
- 1759US9548089B2Pipelining an asynchronous memory reusing a sense amp and an output latchQUALCOMM INC·Filed 2015·Granted Jan 17, 2017·2 cites·19 claims
- 1859US9190141B2Circuits for voltage or current biasing static random access memory (SRAM) bitcells during SRAM reset operations, and related systems and methodsQUALCOMM INC·Filed 2013·Granted Nov 17, 2015·2 cites·27 claims
- 1959US7564266B2Logic state catching circuitsQUALCOMM INC·Filed 2007·Granted Jul 21, 2009·3 cites·19 claims
- 2057US9007817B2Pre-charging bitlines in a static random access memory (SRAM) prior to data access for reducing leakage power, and related systems and methodsQUALCOMM INC·Filed 2013·Granted Apr 14, 2015·2 cites·30 claims
- 2157US7876631B2Self-tuning of signal path delay in circuit employing multiple voltage domainsQUALCOMM INC·Filed 2008·Granted Jan 25, 2011·3 cites·24 claims
- 2250US9196330B2Mimicking multi-voltage domain wordline decoding logic for a memory arrayGE SHAOPING·Filed 2012·Granted Nov 24, 2015·1 cites·19 claims
- 2347US2024242748A1Flexible sram pre-charge systems and methodsMICROSOFT TECHNOLOGY LICENSING LLC·Filed 2023·Application pending·0 cites
- 2446US9442675B2Redirecting data from a defective data entry in memory to a redundant data entry prior to data access, and related systems and methodsQUALCOMM INC·Filed 2013·Granted Sep 13, 2016·0 cites·24 claims
- 2541US11527274B1Memory array circuits including word line circuits for improved word line signal timing and related methodsMICROSOFT TECHNOLOGY LICENSING LLC·Filed 2021·Granted Dec 13, 2022·0 cites·20 claims
- 2641US8576612B2Low leakage high performance static random access memory cell using dual-technology transistorsGARG MANISH·Filed 2011·Granted Nov 5, 2013·0 cites·21 claims
- 2740US6556466B2Method and structure for a CAMRAM cache memoryIBM·Filed 2001·Granted Apr 29, 2003·0 cites·12 claims
- 2836US8154900B2Method and apparatus for reducing power consumption in a content addressable memoryCHAI CHIAMING·Filed 2009·Granted Apr 10, 2012·0 cites·15 claims
- 2934US2018152176A1Voltage aware circuit for dual voltage domain signalsQUALCOMM INC·Filed 2016·Application pending·0 cites
- 3033US2011227639A1Method and Apparatus for Suppressing Bitline Coupling Through Miller Capacitance to a Sense Amplifier Interstitial NodeQUALCOMM INC·Filed 2010·Application pending·0 cites
- 3127US7079409B2Apparatus and method for power savings in high-performance CAM structuresIBM·Filed 2004·Granted Jul 18, 2006·0 cites·18 claims
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Identity basis: PatentsView inventor disambiguation (2025Q4-odp release). How scoring works →