Inventor · disambiguated record
Chi-Yeu Chao
Also filed as: CHAO CHI-YEU
9 granted patents·212 citations·filing 2000–2021
89Inventor score
Top patents by PatentIndex Score
9 records- 0197US10797683B1Calibration circuit and associated calibrating method capable of precisely adjusting clocks with distorted duty cycles and phasesFARADAY TECH CORP·Filed 2020·Granted Oct 6, 2020·18 cites·20 claims
- 0291US6671847B1I/O device testing method and apparatusINTEL CORP·Filed 2000·Granted Dec 30, 2003·73 cites·23 claims
- 0390US6748549B1Clocking an I/O buffer, having a selectable phase difference from the system clock, to and from a remote I/O buffer clocked in phase with the system clockINTEL CORP·Filed 2000·Granted Jun 8, 2004·48 cites·29 claims
- 0485US6396309B1Clocked sense amplifier flip flop with keepers to prevent floating nodesINTEL CORP·Filed 2001·Granted May 28, 2002·33 cites·20 claims
- 0577US6407591B1Self-configurable clock input buffer compatible with high-voltage single-ended and low-voltage differential clock signalsINTEL CORP·Filed 2000·Granted Jun 18, 2002·25 cites·15 claims
- 0653US6781428B2Input circuit with switched reference signalsINTEL CORP·Filed 2001·Granted Aug 24, 2004·6 cites·29 claims
- 0750US11775003B2Clock calibration module, high-speed receiver, and associated calibration methodFARADAY TECH CORP·Filed 2021·Granted Oct 3, 2023·0 cites·20 claims
- 0847US7404099B2Phase-locked loop having dynamically adjustable up/down pulse widthsINTEL CORP·Filed 2004·Granted Jul 22, 2008·7 cites·28 claims
- 0941US6552570B2Input circuit with non-delayed time blankingINTEL CORP·Filed 2001·Granted Apr 22, 2003·2 cites·30 claims
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Identity basis: PatentsView inventor disambiguation (2025Q4-odp release). How scoring works →