Inventor · disambiguated record
Chul-Hwan Choo
Also filed as: CHOO CHUL-HWAN
10 granted patents·1 pending application·32 citations·filing 2006–2023
84Inventor score
Top patents by PatentIndex Score
11 records- 0186US8710655B2Die packages and systems having the die packagesKIM HYUN-JOONG·Filed 2012·Granted Apr 29, 2014·9 cites·20 claims
- 0276US8035412B2On-die termination latency clock control circuit and method of controlling the on-die termination latency clockSAMSUNG ELECTRONICS CO LTD·Filed 2010·Granted Oct 11, 2011·6 cites·20 claims
- 0371US7319634B2Address converter semiconductor device and semiconductor memory device having the sameSAMSUNG ELECTRONICS CO LTD·Filed 2006·Granted Jan 15, 2008·8 cites·33 claims
- 0466US8228704B2Stacked semiconductor chip package with shared DLL signal and method for fabricating stacked semiconductor chip package with shared DLL signalCHOO CHUL-HWAN·Filed 2008·Granted Jul 24, 2012·8 cites·6 claims
- 0560US10727200B2Memory device including bump arrays spaced apart from each other and electronic device including the sameSAMSUNG ELECTRONICS CO LTD·Filed 2018·Granted Jul 28, 2020·1 cites·17 claims
- 0656US12494236B2Memory device and system device including the sameSAMSUNG ELECTRONICS CO LTD·Filed 2023·Granted Dec 9, 2025·0 cites·20 claims
- 0755US12444450B2Memory device and method for managing dynamic voltage frequency scaling operations based on host configurationSAMSUNG ELECTRONICS CO LTD·Filed 2022·Granted Oct 14, 2025·0 cites·20 claims
- 0855US11928363B2Operating method of host device and storage device and storage deviceSAMSUNG ELECTRONICS CO LTD·Filed 2022·Granted Mar 12, 2024·0 cites·20 claims
- 0949US2024188309A1Memory device and memory system including the sameSAMSUNG ELECTRONICS CO LTD·Filed 2023·Application pending·0 cites
- 1043US7701744B2Method of arranging fuses in a fuse box of a semiconductor memory device and a semiconductor memory device including such an arrangementSAMSUNG ELECTRONICS CO LTD·Filed 2007·Granted Apr 20, 2010·0 cites·15 claims
- 1138US10891204B2Memory system, a method of determining an error of the memory system and an electronic apparatus having the memory systemSAMSUNG ELECTRONICS CO LTD·Filed 2018·Granted Jan 12, 2021·0 cites·19 claims
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Identity basis: PatentsView inventor disambiguation (2025Q4-odp release). How scoring works →