Inventor · disambiguated record
Chock Hing Gan
Also filed as: GAN CHOCK H · GAN CHOCK HING
14 granted patents·2 pending applications·588 citations·filing 1997–2015
93Inventor score
Top patents by PatentIndex Score
16 records- 0195US9070551B2Method and apparatus for a diffusion bridged cell libraryQUALCOMM INC·Filed 2013·Granted Jun 30, 2015·60 cites·7 claims
- 0295US8782576B1Method and apparatus for a diffusion bridged cell libraryQUALCOMM INC·Filed 2013·Granted Jul 15, 2014·73 cites·2 claims
- 0395US5856225ACreation of a self-aligned, ion implanted channel region, after source and drain formationCHARTERED SEMICONDUCTOR MFG·Filed 1997·Granted Jan 5, 1999·253 cites·22 claims
- 0489US6309933B1Method of fabricating T-shaped recessed polysilicon gate transistorsCHARTERED SEMICONDUCTOR MFG·Filed 2000·Granted Oct 30, 2001·46 cites·24 claims
- 0584US6475916B1Method of patterning gate electrode with ultra-thin gate dielectricCHARTERED SEMICONDUCTOR MFG·Filed 2000·Granted Nov 5, 2002·37 cites·24 claims
- 0677US6027982AMethod to form shallow trench isolation structures with improved isolation fill and surface planarityCHARTERED SEMICONDUCTOR MFG·Filed 1999·Granted Feb 22, 2000·57 cites·20 claims
- 0773US6531380B2Method of fabricating T-shaped recessed polysilicon gate transistorsCHARTERED SEMICONDUCTOR MFG·Filed 2001·Granted Mar 11, 2003·16 cites·38 claims
- 0871US8610176B2Standard cell architecture using double poly patterning for multi VT devicesPATEL PRAYAG B·Filed 2011·Granted Dec 17, 2013·5 cites·22 claims
- 0956US6303458B1Alignment mark scheme for Sti process to save one mask stepCHARTERED SEMICONDUCTOR MFG·Filed 1998·Granted Oct 16, 2001·24 cites·3 claims
- 1055US9076775B2System and method of varying gate lengths of multiple coresQUALCOMM INC·Filed 2013·Granted Jul 7, 2015·0 cites·37 claims
- 1154US2015064864A1Method and apparatus for a diffusion bridged cell libraryQUALCOMM INC·Filed 2014·Application pending·0 cites
- 1252US9461040B2System and method of varying gate lengths of multiple coresQUALCOMM INC·Filed 2015·Granted Oct 4, 2016·0 cites·30 claims
- 1349US6165869AMethod to avoid dishing in forming trenches for shallow trench isolationCHARTERED SEMICONDUCTOR MFG·Filed 1998·Granted Dec 26, 2000·17 cites·22 claims
- 1448US9245971B2Semiconductor device having high mobility channelQUALCOMM INC·Filed 2013·Granted Jan 26, 2016·0 cites·45 claims
- 1543US8558320B2Systems and methods employing a physically asymmetric semiconductor device having symmetrical electrical behaviorYANG HAINING·Filed 2009·Granted Oct 15, 2013·0 cites·23 claims
- 1643US2014181761A1Identifying circuit elements for selective inclusion in speed-push processing in an integrated circuit, and related circuit systems, apparatus, and computer-readable mediaQUALCOMM INC·Filed 2012·Application pending·0 cites
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Identity basis: PatentsView inventor disambiguation (2025Q4-odp release). How scoring works →