Inventor · disambiguated record
Chao-Shun Hsu
Also filed as: HSU CHAO-SHUN
9 granted patents·1 pending application·233 citations·filing 2006–2013
90Inventor score
Top patents by PatentIndex Score
10 records- 0197US7427803B2Electromagnetic shielding using through-silicon viasTAIWAN SEMICONDUCTOR MFG·Filed 2006·Granted Sep 23, 2008·84 cites·18 claims
- 0294US7494846B2Design techniques for stacking identical memory diesTAIWAN SEMICONDUCTOR MFG·Filed 2007·Granted Feb 24, 2009·42 cites·16 claims
- 0393US8945998B2Programmable semiconductor interposer for electronic package and method of formingTAIWAN SEMICONDUCTOR MFG·Filed 2013·Granted Feb 3, 2015·15 cites·21 claims
- 0491US7795735B2Methods for forming single dies with multi-layer interconnect structures and structures formed therefromTAIWAN SEMICONDUCTOR MFG·Filed 2007·Granted Sep 14, 2010·30 cites·17 claims
- 0589US8476735B2Programmable semiconductor interposer for electronic package and method of formingHSU CHAO-SHUN·Filed 2007·Granted Jul 2, 2013·26 cites·20 claims
- 0686US7812426B2TSV-enabled twisted pairTAIWAN SEMICONDUCTOR MFG·Filed 2008·Granted Oct 12, 2010·14 cites·18 claims
- 0775US7565635B2SiP (system in package) design systems and methodsTAIWAN SEMICONDUCTOR MFG·Filed 2007·Granted Jul 21, 2009·9 cites·18 claims
- 0874US8492872B2On-chip inductors with through-silicon-via fence for Q improvementYANG LI-CHUN·Filed 2007·Granted Jul 23, 2013·9 cites·11 claims
- 0964US8704375B2Barrier structures and methods for through substrate viasLIU MAX·Filed 2009·Granted Apr 22, 2014·4 cites·20 claims
- 1049US2010174858A1Extra high bandwidth memory die stackTAIWAN SEMICONDUCTOR MFG·Filed 2009·Application pending·0 cites
Join the waitlist — get patent alerts
Get an alert when Chao-Shun Hsu files or is granted a new patent.
We store only your email — no account needed. See our privacy policy.
Identity basis: PatentsView inventor disambiguation (2025Q4-odp release). How scoring works →