Inventor · disambiguated record
Chia-Hong Jan
Also filed as: JAN CHIA-HONG
147 granted patents·15 pending applications·3,635 citations·filing 1993–2025
99Inventor score
Top patents by PatentIndex Score
162 records- 0198US8432751B2Memory cell using BTI effects in high-k metal gate MOSHAFEZ WALID M·Filed 2010·Granted Apr 30, 2013·187 cites·20 claims
- 0298US6521964B1Device having spacers for improved salicide resistance on polysilicon gatesINTEL CORP·Filed 1999·Granted Feb 18, 2003·241 cites·6 claims
- 0398US6509618B2Device having thin first spacers and partially recessed thick second spacers for improved salicide resistance on polysilicon gatesINTEL CORP·Filed 2000·Granted Jan 21, 2003·239 cites·8 claims
- 0498US6506652B2Method of recessing spacers to improved salicide resistance on polysilicon gatesINTEL CORP·Filed 1999·Granted Jan 14, 2003·239 cites·9 claims
- 0597US11335601B2Non-planar I/O and logic semiconductor devices having different workfunction on common substrateINTEL CORP·Filed 2020·Granted May 17, 2022·6 cites·24 claims
- 0697US10892192B2Non-planar I/O and logic semiconductor devices having different workfunction on common substrateINTEL CORP·Filed 2020·Granted Jan 12, 2021·5 cites·20 claims
- 0797US6165826ATransistor with low resistance tip and method of fabrication in a CMOS processINTEL CORP·Filed 1995·Granted Dec 26, 2000·301 cites·52 claims
- 0897US5908313AMethod of forming a transistorINTEL CORP·Filed 1996·Granted Jun 1, 1999·297 cites·16 claims
- 0996US11823954B2Non-planar I/O and logic semiconductor devices having different workfunction on common substrateINTEL CORP·Filed 2022·Granted Nov 21, 2023·2 cites·24 claims
- 1096US7682916B2Field effect transistor structure with abrupt source/drain junctionsINTEL CORP·Filed 2008·Granted Mar 23, 2010·31 cites·10 claims
- 1196US7338873B2Method of fabricating a field effect transistor structure with abrupt source/drain junctionsINTEL CORP·Filed 2006·Granted Mar 4, 2008·28 cites·5 claims
- 1296US6887762B1Method of fabricating a field effect transistor structure with abrupt source/drain junctionsINTEL CORP·Filed 1999·Granted May 3, 2005·141 cites·10 claims
- 1395US6765273B1Device structure and method for reducing silicide encroachmentINTEL CORP·Filed 1998·Granted Jul 20, 2004·240 cites·3 claims
- 1495US6235568B1Semiconductor device having deposited silicon regions and a method of fabricationINTEL CORP·Filed 1999·Granted May 22, 2001·303 cites·30 claims
- 1595US5710450ATransistor with ultra shallow tip and method of fabricationINTEL CORP·Filed 1994·Granted Jan 20, 1998·199 cites·30 claims
- 1694US9159734B2Antifuse element utilizing non-planar topologyHAFEZ WALID M·Filed 2011·Granted Oct 13, 2015·21 cites·23 claims
- 1794US8981481B2High voltage three-dimensional devices having dielectric linersHAFEZ WALID M·Filed 2012·Granted Mar 17, 2015·12 cites·15 claims
- 1894US7541239B2Selective spacer formation on transistors of different classes on the same deviceINTEL CORP·Filed 2006·Granted Jun 2, 2009·26 cites·14 claims
- 1994US6479391B2Method for making a dual damascene interconnect using a multilayer hard maskINTEL CORP·Filed 2000·Granted Nov 12, 2002·88 cites·7 claims
- 2094US6326664B1Transistor with ultra shallow tip and method of fabricationINTEL CORP·Filed 1997·Granted Dec 4, 2001·128 cites·33 claims
- 2193US10312367B2Monolithic integration of high voltage transistors and low voltage non-planar transistorsINTEL CORP·Filed 2014·Granted Jun 4, 2019·12 cites·10 claims
- 2293US9972642B2High voltage three-dimensional devices having dielectric linersINTEL CORP·Filed 2017·Granted May 15, 2018·5 cites·20 claims
- 2393US7943468B2Penetrating implant for forming a semiconductor deviceINTEL CORP·Filed 2008·Granted May 17, 2011·20 cites·9 claims
- 2493US6121100AMethod of fabricating a MOS transistor with a raised source/drain extensionINTEL CORP·Filed 1997·Granted Sep 19, 2000·147 cites·12 claims
- 2592US10096599B2Methods of integrating multiple gate dielectric transistors on a tri-gate (finFET) processINTEL CORP·Filed 2015·Granted Oct 9, 2018·7 cites·6 claims
- 2692US9786783B2Transistor architecture having extended recessed spacer and source/drain regions and method of making sameINTEL CORP·Filed 2013·Granted Oct 10, 2017·16 cites·25 claims
- 2791US10692771B2Non-planar I/O and logic semiconductor devices having different workfunction on common substrateINTEL CORP·Filed 2019·Granted Jun 23, 2020·4 cites·20 claims
- 2891US8796772B2Precision resistor for non-planar semiconductor device architectureYEH JENG-YA D·Filed 2012·Granted Aug 5, 2014·14 cites·24 claims
- 2991US7436035B2Method of fabricating a field effect transistor structure with abrupt source/drain junctionsINTEL CORP·Filed 2004·Granted Oct 14, 2008·36 cites·7 claims
- 3091US6777759B1Device structure and method for reducing silicide encroachmentINTEL CORP·Filed 2000·Granted Aug 17, 2004·58 cites·5 claims
- 3191US2025031446A1High voltage three-dimensional devices having dielectric linersINTEL CORP·Filed 2024·Application pending·0 cites
- 3290US9899472B2Dielectric and isolation lower fin material for fin-based electronicsINTEL CORP·Filed 2017·Granted Feb 20, 2018·4 cites·23 claims
- 3389US10204999B2Transistor with airgap spacerINTEL CORP·Filed 2015·Granted Feb 12, 2019·8 cites·8 claims
- 3489US2025098275A1Non-planar i/o and logic semiconductor devices having different workfunction on common substrateINTEL CORP·Filed 2024·Application pending·0 cites
- 3588US12136628B2High voltage three-dimensional devices having dielectric linersINTEL CORP·Filed 2023·Granted Nov 5, 2024·0 cites·20 claims
- 3687US10431661B2Transistor with inner-gate spacerINTEL CORP·Filed 2015·Granted Oct 1, 2019·5 cites·20 claims
- 3787US10115721B2Planar device on fin-based transistor architectureINTEL CORP·Filed 2016·Granted Oct 30, 2018·5 cites·20 claims
- 3887US9929090B2Antifuse element using spacer breakdownINTEL CORP·Filed 2014·Granted Mar 27, 2018·7 cites·25 claims
- 3987US9570467B2High voltage three-dimensional devices having dielectric linersHAFEZ WALID M·Filed 2015·Granted Feb 14, 2017·3 cites·5 claims
- 4087US6198142B1Transistor with minimal junction capacitance and method of fabricationINTEL CORP·Filed 1998·Granted Mar 6, 2001·85 cites·9 claims
- 4186US8889508B2Precision resistor for non-planar semiconductor device architectureYEH JENG-YA D·Filed 2014·Granted Nov 18, 2014·8 cites·6 claims
- 4286US5891809AManufacturable dielectric formed using multiple oxidation and anneal stepsINTEL CORP·Filed 1995·Granted Apr 6, 1999·92 cites·38 claims
- 4385US12191207B2Non-planar I/O and logic semiconductor devices having different workfunction on common substrateINTEL CORP·Filed 2023·Granted Jan 7, 2025·0 cites·20 claims
- 4485US11881486B2High voltage three-dimensional devices having dielectric linersINTEL CORP·Filed 2023·Granted Jan 23, 2024·0 cites·20 claims
- 4585US10535747B2Transistor with dual-gate spacerINTEL CORP·Filed 2015·Granted Jan 14, 2020·5 cites·21 claims
- 4685US9793373B2Field effect transistor structure with abrupt source/drain junctionsINTEL CORP·Filed 2017·Granted Oct 17, 2017·2 cites·10 claims
- 4784US10707346B2High-voltage transistor with self-aligned isolationINTEL CORP·Filed 2015·Granted Jul 7, 2020·3 cites·3 claims
- 4884US10229853B2Non-planar I/O and logic semiconductor devices having different workfunction on common substrateINTEL CORP·Filed 2013·Granted Mar 12, 2019·4 cites·14 claims
- 4984US9640634B2Field effect transistor structure with abrupt source/drain junctionsMURTHY ANAND S·Filed 2010·Granted May 2, 2017·4 cites·16 claims
- 5084US8681573B2Programmable/re-programmable device in high-k metal gate MOSINTEL CORP·Filed 2013·Granted Mar 25, 2014·5 cites·24 claims
Showing the top 50 of 162 patent records by PatentIndex Score.
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Identity basis: PatentsView inventor disambiguation (2025Q4-odp release). How scoring works →