Inventor · disambiguated record
Christopher J. Jezewski
Also filed as: JEZEWSKI CHRISTOPHER · JEZEWSKI CHRISTOPHER J · Jezewski Christopher James
76 granted patents·29 pending applications·227 citations·filing 2001–2025
98Inventor score
Top patents by PatentIndex Score
105 records- 0198US11444024B2Subtractively patterned interconnect structures for integrated circuitsINTEL CORP·Filed 2020·Granted Sep 13, 2022·10 cites·30 claims
- 0297US9054164B1Method of forming high density, high shorting margin, and low capacitance interconnects by alternating recessed trenchesJEZEWSKI CHRISTOPHER J·Filed 2013·Granted Jun 9, 2015·41 cites·25 claims
- 0395US12107085B2Interconnect techniques for electrically connecting source/drain regions of stacked transistorsINTEL CORP·Filed 2023·Granted Oct 1, 2024·2 cites·20 claims
- 0495US12027458B2Subtractively patterned interconnect structures for integrated circuitsINTEL CORP·Filed 2022·Granted Jul 2, 2024·2 cites·20 claims
- 0595US9514983B2Cobalt based interconnects and methods of fabrication thereofJEZEWSKI CHRISTOPHER J·Filed 2012·Granted Dec 6, 2016·32 cites·19 claims
- 0693US11830788B2Integrated circuits and methods for forming integrated circuitsINTEL CORP·Filed 2021·Granted Nov 28, 2023·2 cites·6 claims
- 0793US9997457B2Cobalt based interconnects and methods of fabrication thereofINTEL CORP·Filed 2013·Granted Jun 12, 2018·12 cites·18 claims
- 0893US9385082B2Method of forming high density, high shorting margin, and low capacitance interconnects by alternating recessed trenchesINTEL CORP·Filed 2015·Granted Jul 5, 2016·7 cites·19 claims
- 0991US10937689B2Self-aligned hard masks with converted linersINTEL CORP·Filed 2016·Granted Mar 2, 2021·7 cites·20 claims
- 1091US9165824B2Interconnects with fully clad linesINTEL CORP·Filed 2013·Granted Oct 20, 2015·11 cites·19 claims
- 1188US9406615B2Techniques for forming interconnects in porous dielectric materialsINTEL CORP·Filed 2013·Granted Aug 2, 2016·6 cites·25 claims
- 1288US9253884B2Electronic fabric with incorporated chip and interconnectINTEL CORP·Filed 2013·Granted Feb 2, 2016·6 cites·18 claims
- 1388US2025357335A1Method of forming high density, high shorting margin, and low capacitance interconnects by alternating recessed trenchesTAHOE RES LTD·Filed 2025·Application pending·0 cites
- 1487US8508018B2Barrier layersAKOLKAR ROHAN N·Filed 2010·Granted Aug 13, 2013·14 cites·15 claims
- 1586US10700007B2Cobalt based interconnects and methods of fabrication thereofINTEL CORP·Filed 2018·Granted Jun 30, 2020·3 cites·22 claims
- 1685US12394716B2Integrated circuit interconnect structures with graphene capINTEL CORP·Filed 2021·Granted Aug 19, 2025·1 cites·19 claims
- 1785US12354956B2Cobalt based interconnects and methods of fabrication thereofTAHOE RES LTD·Filed 2023·Granted Jul 8, 2025·0 cites·20 claims
- 1884US9736936B2Electronic fabric with incorporated chip and interconnectINTEL CORP·Filed 2016·Granted Aug 15, 2017·3 cites·20 claims
- 1983US12482744B2Subtractively patterned interconnect structures for integrated circuitsINTEL CORP·Filed 2024·Granted Nov 25, 2025·0 cites·19 claims
- 2083US11742346B2Interconnect techniques for electrically connecting source/drain regions of stacked transistorsINTEL CORP·Filed 2018·Granted Aug 29, 2023·3 cites·24 claims
- 2183US11380617B2Method of forming high density, high shorting margin, and low capacitance interconnects by alternating recessed trenchesINTEL CORP·Filed 2018·Granted Jul 5, 2022·2 cites·20 claims
- 2281US11171239B2Transistor channel passivation with 2D crystalline materialINTEL CORP·Filed 2019·Granted Nov 9, 2021·2 cites·17 claims
- 2381US9911694B2Method of forming high density, high shorting margin, and low capacitance interconnects by alternating recessed trenchesINTEL CORP·Filed 2016·Granted Mar 6, 2018·2 cites·20 claims
- 2480US6568294B2Shifter with automatic and manual shift modes and with shift position indicatorsGRAND HAVEN STAMPED PROD·Filed 2001·Granted May 27, 2003·22 cites·17 claims
- 2579US12322699B2Method of forming high density, high shorting margin, and low capacitance interconnects by alternating recessed trenchesTAHOE RES LTD·Filed 2022·Granted Jun 3, 2025·0 cites·20 claims
- 2679US11522059B2Metallic sealants in transistor arrangementsINTEL CORP·Filed 2018·Granted Dec 6, 2022·2 cites·25 claims
- 2778US11862563B2Cobalt based interconnects and methods of fabrication thereofTAHOE RES LTD·Filed 2022·Granted Jan 2, 2024·0 cites·22 claims
- 2877US10068845B2Seam healing of metal interconnectsINTEL CORP·Filed 2014·Granted Sep 4, 2018·3 cites·16 claims
- 2977US9379010B2Methods for forming interconnect layers having tight pitch interconnect structuresINTEL CORP·Filed 2014·Granted Jun 28, 2016·4 cites·22 claims
- 3077US8941128B2Passivation layer for flexible displayPILLARISETTY RAVI·Filed 2012·Granted Jan 27, 2015·2 cites·26 claims
- 3174US11276644B2Integrated circuits and methods for forming thin film crystal layersINTEL CORP·Filed 2018·Granted Mar 15, 2022·1 cites·9 claims
- 3274US7981756B2Common plate capacitor array connections, and processes of making sameINTEL CORP·Filed 2008·Granted Jul 19, 2011·5 cites·22 claims
- 3373US11205586B2Integrated circuits with line breaks and line bridges within a single interconnect levelINTEL CORP·Filed 2017·Granted Dec 21, 2021·1 cites·20 claims
- 3473US9258114B2Quantum key distribution (QSD) scheme using photonic integrated circuit (PIC)INTEL CORP·Filed 2012·Granted Feb 9, 2016·3 cites·27 claims
- 3573US8803283B2Vertical meander inductor for small core voltage regulatorsJEZEWSKI CHRISTOPHER J·Filed 2012·Granted Aug 12, 2014·2 cites·28 claims
- 3673US2024162058A1Tools and methods for subtractive metal patterningINTEL CORP·Filed 2024·Application pending·0 cites
- 3772US12211794B2Integrated circuits and methods for forming thin film crystal layersINTEL CORP·Filed 2022·Granted Jan 28, 2025·0 cites·9 claims
- 3872US11328993B2Cobalt based interconnects and methods of fabrication thereofINTEL CORP·Filed 2020·Granted May 10, 2022·0 cites·10 claims
- 3972US9374509B2Wearable imaging sensor for communicationsPILLARISETTY RAVI·Filed 2012·Granted Jun 21, 2016·1 cites·19 claims
- 4072US9343411B2Techniques for enhancing fracture resistance of interconnectsINTEL CORP·Filed 2013·Granted May 17, 2016·3 cites·27 claims
- 4172US8441097B2Methods to form memory devices having a capacitor with a recessed electrodeSTEIGERWALD JOSEPH M·Filed 2009·Granted May 14, 2013·5 cites·12 claims
- 4271US11888034B2Transistors with metal chalcogenide channel materialsINTEL CORP·Filed 2019·Granted Jan 30, 2024·1 cites·19 claims
- 4371US10876610B2Self-locking nut and screw assemblyEATON INTELLIGENT POWER LTD·Filed 2018·Granted Dec 29, 2020·1 cites·20 claims
- 4470US12033896B2Isolation wall stressor structures to improve channel stress and their methods of fabricationINTEL CORP·Filed 2022·Granted Jul 9, 2024·0 cites·20 claims
- 4570US11869894B2Metallization structures for stacked device connectivity and their methods of fabricationINTEL CORP·Filed 2022·Granted Jan 9, 2024·0 cites·20 claims
- 4670US11830768B2Integrated circuits with line breaks and line bridges within a single interconnect levelINTEL CORP·Filed 2021·Granted Nov 28, 2023·0 cites·20 claims
- 4768US12107170B2Transistor channel passivation with 2D crystalline materialINTEL CORP·Filed 2021·Granted Oct 1, 2024·0 cites·17 claims
- 4868US11444205B2Contact stacks to reduce hydrogen in thin film transistorINTEL CORP·Filed 2018·Granted Sep 13, 2022·1 cites·23 claims
- 4965US9385085B2Interconnects with fully clad linesINTEL CORP·Filed 2015·Granted Jul 5, 2016·1 cites·17 claims
- 5061US2025385047A1Composite insulator films with low electrical leakage & high charge capacitanceINTEL CORP·Filed 2024·Application pending·0 cites
Showing the top 50 of 105 patent records by PatentIndex Score.
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Identity basis: PatentsView inventor disambiguation (2025Q4-odp release). How scoring works →