Inventor · disambiguated record
Chieh-Pu Lo
Also filed as: Lo Chieh-Pu
7 granted patents·2 pending applications·70 citations·filing 2015–2024
83Inventor score
Top patents by PatentIndex Score
9 records- 0196US9722584B1Non-volatile latchNAT UNIV TSING HUA·Filed 2016·Granted Aug 1, 2017·34 cites·14 claims
- 0293US9564209B1Non-volatile static random access memory using a 7T1R cell with initialization and pulse overwriteNAT UNIV TSING HUA·Filed 2015·Granted Feb 7, 2017·19 cites·8 claims
- 0391US9502114B1Non-volatile ternary content-addressable memory with bi-directional voltage divider control and multi-step searchNAT UNIV TSING HUA·Filed 2015·Granted Nov 22, 2016·14 cites·20 claims
- 0486US11262778B2Reference voltage generationTAIWAN SEMICONDUCTOR MFG CO LTD·Filed 2020·Granted Mar 1, 2022·2 cites·20 claims
- 0579US2025117035A1Reference voltage generationTAIWAN SEMICONDUCTOR MFG CO LTD·Filed 2024·Application pending·0 cites
- 0677US11137785B2On-chip power regulation system for MRAM operationTAIWAN SEMICONDUCTOR MFG CO LTD·Filed 2020·Granted Oct 5, 2021·1 cites·20 claims
- 0771US12164320B2Reference voltage generationTAIWAN SEMICONDUCTOR MFG CO LTD·Filed 2022·Granted Dec 10, 2024·0 cites·20 claims
- 0871US11720130B2On-chip power regulation system for MRAM operationTAIWAN SEMICONDUCTOR MFG CO LTD·Filed 2021·Granted Aug 8, 2023·0 cites·19 claims
- 0942US2022269483A1Compute in memory accumulatorTAIWAN SEMICONDUCTOR MFG CO LTD·Filed 2021·Application pending·0 cites
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Identity basis: PatentsView inventor disambiguation (2025Q4-odp release). How scoring works →