Inventor · disambiguated record
Chin S. Park
Also filed as: PARK CHIN S · PARK CHIN-SUP
8 granted patents·1 pending application·360 citations·filing 1986–2022
90Inventor score
Top patents by PatentIndex Score
9 records- 0194US5027321AApparatus and method for improved reading/programming of virtual ground EPROM arraysINTEL CORP·Filed 1989·Granted Jun 25, 1991·117 cites·7 claims
- 0282US5040134ANeural network employing leveled summing scheme with blocked arrayINTEL CORP·Filed 1989·Granted Aug 13, 1991·47 cites·14 claims
- 0379US4999525AExclusive-or cell for pattern matching employing floating gate devicesINTEL CORP·Filed 1989·Granted Mar 12, 1991·49 cites·16 claims
- 0473US4760349ACMOS analog standard cell arrays using linear transconductance elementsUNIV MINNESOTA·Filed 1986·Granted Jul 26, 1988·34 cites·24 claims
- 0566US5487133ADistance calculating neural network classifier chip and systemINTEL CORP·Filed 1993·Granted Jan 23, 1996·61 cites·29 claims
- 0666US4992980ANovel architecture for virtual ground high-density EPROMSINTEL CORP·Filed 1989·Granted Feb 12, 1991·23 cites·18 claims
- 0762US5128895AMethod for programming a virtual ground EPROM cell including slow ramping of the column line voltageINTEL CORP·Filed 1991·Granted Jul 7, 1992·24 cites·4 claims
- 0849US2023195200A1Automatic on-die frequency tuning using tunable replica circuitsINTEL CORP·Filed 2022·Application pending·0 cites
- 0948US6803797B2System and method for extending delay-locked loop frequency application rangeINTEL CORP·Filed 2003·Granted Oct 12, 2004·5 cites·28 claims
Join the waitlist — get patent alerts
Get an alert when Chin S. Park files or is granted a new patent.
We store only your email — no account needed. See our privacy policy.
Identity basis: PatentsView inventor disambiguation (2025Q4-odp release). How scoring works →