Inventor · disambiguated record
Chiloda Ashan Senerath Pathirane
Also filed as: PATHIRANE CHILODA ASHAN SENERATH · PATHIRANE Chiloda Ashan Senarath
20 granted patents·2 pending applications·46 citations·filing 2008–2019
91Inventor score
Top patents by PatentIndex Score
22 records- 0190US10579389B2Fusion of instructions by delaying handling of a partial subset of a fusible group of instructionsADVANCED RISC MACH LTD·Filed 2015·Granted Mar 3, 2020·9 cites·18 claims
- 0286US8051323B2Auxiliary circuit structure in a split-lock dual processor systemADVANCED RISC MACH LTD·Filed 2010·Granted Nov 1, 2011·10 cites·19 claims
- 0383US11416252B2Program instruction fusionADVANCED RISC MACH LTD·Filed 2017·Granted Aug 16, 2022·4 cites·11 claims
- 0481US9658919B2Malfunction escalationADVANCED RISC MACH LTD·Filed 2015·Granted May 23, 2017·4 cites·14 claims
- 0577US9449717B2Memory built-in self-test for a data processing apparatusADVANCED RISC MACH LTD·Filed 2014·Granted Sep 20, 2016·6 cites·17 claims
- 0672US9710359B2Executing debug program instructions on a target apparatus processing pipelineADVANCED RISC MACH LTD·Filed 2015·Granted Jul 18, 2017·2 cites·22 claims
- 0770US8015337B2Power efficient interrupt detectionADVANCED RISC MACH LTD·Filed 2009·Granted Sep 6, 2011·6 cites·15 claims
- 0865US9645824B2Branch target address cache using hashed fetch addressesADVANCED RISC MACH LTD·Filed 2012·Granted May 9, 2017·2 cites·14 claims
- 0960US8055888B2Initialisation of a pipelined processorADVANCED RISC MACH LTD·Filed 2008·Granted Nov 8, 2011·2 cites·21 claims
- 1056US11216277B2Apparatus and method of capturing a register stateADVANCED RISC MACH LTD·Filed 2019·Granted Jan 4, 2022·0 cites·20 claims
- 1155US10552160B2Handling stalling event for multiple thread pipeline, and triggering action based on information access delayADVANCED RISC MACH LTD·Filed 2018·Granted Feb 4, 2020·0 cites·13 claims
- 1253US8108730B2Debugging a multiprocessor system that switches between a locked mode and a split modePATHIRANE CHILODA ASHAN SENERATH·Filed 2010·Granted Jan 31, 2012·1 cites·19 claims
- 1350US8966228B2Instruction fetching following changes in program flowCRASKE SIMON JOHN·Filed 2009·Granted Feb 24, 2015·0 cites·18 claims
- 1448US11068238B2Multiplier circuitADVANCED RISC MACH LTD·Filed 2019·Granted Jul 20, 2021·0 cites·20 claims
- 1548US2017139716A1Handling stalling event for multiple thread pipeline, and triggering action based on information access delayADVANCED RISC MACH LTD·Filed 2015·Application pending·0 cites
- 1647US10719329B2Apparatus and method for using predicted result valuesADVANCED RISC MACH LTD·Filed 2018·Granted Jul 21, 2020·0 cites·20 claims
- 1742US10963253B2Varying micro-operation composition based on estimated value of predicate value for predicated vector instructionADVANCED RISC MACH LTD·Filed 2018·Granted Mar 30, 2021·0 cites·17 claims
- 1842US10296349B2Allocating a register to an instruction using register index informationADVANCED RISC MACH LTD·Filed 2016·Granted May 21, 2019·0 cites·18 claims
- 1941US11036510B2Processing merging predicated instruction with timing permitting previous value of destination register to be unavailable when the merging predicated instruction is at a given pipeline stage at which a processing result is determinedADVANCED RISC MACH LTD·Filed 2018·Granted Jun 15, 2021·0 cites·15 claims
- 2040US9665494B2Parallel lookup in first and second value storesADVANCED RISC MACH LTD·Filed 2015·Granted May 30, 2017·0 cites·21 claims
- 2140US2011179255A1Data processing reset operationsADVANCED RISC MACH LTD·Filed 2010·Application pending·0 cites
- 2238US11429393B2Apparatus and method for supporting out-of-order program execution of instructionsADVANCED RISC MACH LTD·Filed 2015·Granted Aug 30, 2022·0 cites·11 claims
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Identity basis: PatentsView inventor disambiguation (2025Q4-odp release). How scoring works →