Inventor · disambiguated record
Chiou-Shian Peng
Also filed as: PENG CHIOU-SHIAN
20 granted patents·1 pending application·738 citations·filing 1999–2010
96Inventor score
Top patents by PatentIndex Score
21 records- 0196US6482669B1Colors only process to reduce package yield lossTAIWAN SEMICONDUCTOR MFG·Filed 2001·Granted Nov 19, 2002·81 cites·13 claims
- 0296US6426281B1Method to form bump in bumping technologyTAIWAN SEMICONDUCTOR MFG·Filed 2001·Granted Jul 30, 2002·147 cites·17 claims
- 0393US6605524B1Bumping process to increase bump height and to create a more robust bump structureTAIWAN SEMICONDUCTOR MFG·Filed 2001·Granted Aug 12, 2003·78 cites·24 claims
- 0493US6586323B1Method for dual-layer polyimide processing on bumping technologyTAIWAN SEMICONDUCTOR MFG·Filed 2000·Granted Jul 1, 2003·76 cites·13 claims
- 0591US7183598B2Colors only process to reduce package yield lossTAIWAN SEMICONDUCTOR MFG·Filed 2005·Granted Feb 27, 2007·10 cites·17 claims
- 0691US6632700B1Method to form a color image sensor cell while protecting the bonding pad structure from damageTAIWAN SEMICONDUCTOR MFG·Filed 2002·Granted Oct 14, 2003·58 cites·20 claims
- 0786US6958546B2Method for dual-layer polyimide processing on bumping technologyTAIWAN SEMICONDUCTOR MFG·Filed 2003·Granted Oct 25, 2005·45 cites·9 claims
- 0885US7816169B2Colors only process to reduce package yield lossTAIWAN SEMICONDUCTOR MFG·Filed 2008·Granted Oct 19, 2010·5 cites·20 claims
- 0985US6956292B2Bumping process to increase bump height and to create a more robust bump structureTAIWAN SEMICONDUCTOR MFG·Filed 2003·Granted Oct 18, 2005·37 cites·20 claims
- 1083US6583039B2Method of forming a bump on a copper padTAIWAN SEMICONDUCTOR MFG·Filed 2001·Granted Jun 24, 2003·37 cites·18 claims
- 1182US6649507B1Dual layer photoresist method for fabricating a mushroom bumping plating structureTAIWAN SEMICONDUCTOR MFG·Filed 2001·Granted Nov 18, 2003·33 cites·25 claims
- 1278US6936923B2Method to form very a fine pitch solder bump using methods of electroplatingTAIWAN SEMICONDUCTOR MFG·Filed 2002·Granted Aug 30, 2005·23 cites·9 claims
- 1376US7485906B2Colors only process to reduce package yield lossTAIWAN SEMICONDUCTOR MFG·Filed 2006·Granted Feb 3, 2009·2 cites·20 claims
- 1475US6756184B2Method of making tall flip chip bumpsTAIWAN SEMICONDUCTOR MFG·Filed 2001·Granted Jun 29, 2004·29 cites·20 claims
- 1575US6372545B1Method for under bump metal patterning of bumping processTAIWAN SEMICONDUCTOR MFG·Filed 2001·Granted Apr 16, 2002·22 cites·35 claims
- 1675US6319846B1Method for removing solder bodies from a semiconductor waferTAIWAN SEMICONDUCTOR MFG·Filed 2001·Granted Nov 20, 2001·26 cites·20 claims
- 1773US6876049B2Colors only process to reduce package yield lossTAIWAN SEMICONDUCTOR MFG·Filed 2002·Granted Apr 5, 2005·12 cites·20 claims
- 1862US6426283B1Method for bumping and backlapping a semiconductor waferTAIWAN SEMICONDUCTOR MFG·Filed 2000·Granted Jul 30, 2002·10 cites·18 claims
- 1945US2010252099A1High efficiency colored solar cell and manufacturing method thereofGINTECH ENERGY CORP·Filed 2010·Application pending·0 cites
- 2040US6211028B1Twin current bipolar device with hi-lo base profileTAIWAN SEMICONDUCTOR MFG·Filed 1999·Granted Apr 3, 2001·7 cites·11 claims
- 2134US6747336B2Twin current bipolar device with hi-lo base profileTAIWAN SEMICONDUCTOR MFG·Filed 2001·Granted Jun 8, 2004·0 cites·9 claims
Join the waitlist — get patent alerts
Get an alert when Chiou-Shian Peng files or is granted a new patent.
We store only your email — no account needed. See our privacy policy.
Identity basis: PatentsView inventor disambiguation (2025Q4-odp release). How scoring works →