Inventor · disambiguated record
Chang Hua Siau
Also filed as: SIAU CHANG · SIAU CHANG H · SIAU CHANG HUA
106 granted patents·6 pending applications·1,016 citations·filing 2006–2024
99Inventor score
Files withUNITY SEMICONDUCTOR CORP55MICRON TECHNOLOGY INC17SANDISK 3D LLC15SIAU CHANG HUA9SANDISK TECHNOLOGIES INC5
Top patents by PatentIndex Score
112 records- 0199US8139409B2Access signal adjustment circuits and methods for memory cells in a cross-point arrayCHEVALLIER CHRISTOPHE·Filed 2010·Granted Mar 20, 2012·57 cites·16 claims
- 0298US8559209B2Array voltage regulating technique to enable data operations on large cross-point memory arrays with resistive memory elementsSIAU CHANG HUA·Filed 2011·Granted Oct 15, 2013·44 cites·27 claims
- 0398US7701791B2Low read current architecture for memoryUNITY SEMICONDUCTOR CORP·Filed 2007·Granted Apr 20, 2010·73 cites·15 claims
- 0498US7379364B2Sensing a signal in a two-terminal memory array having leakage currentUNITY SEMICONDUCTOR CORP·Filed 2006·Granted May 27, 2008·99 cites·24 claims
- 0598US7372753B1Two-cycle sensing in a two-terminal memory array having leakage currentUNITY SEMICONDUCTOR CORP·Filed 2006·Granted May 13, 2008·109 cites·25 claims
- 0697US9117495B2Global bit line pre-charge circuit that compensates for process, operating voltage, and temperature variationsUNITY SEMICONDUCTOR CORP·Filed 2013·Granted Aug 25, 2015·21 cites·18 claims
- 0797US8891276B2Memory array with local bitlines and local-to-global bitline pass gates and gain stagesSIAU CHANG HUA·Filed 2011·Granted Nov 18, 2014·40 cites·26 claims
- 0897US8565003B2Multilayer cross-point memory array having reduced disturb susceptibilitySIAU CHANG HUA·Filed 2011·Granted Oct 22, 2013·42 cites·34 claims
- 0997US8363443B2Circuits and techniques to compensate data signals for variations of parameters affecting memory cells in cross-point arraysUNITY SEMICONDUCTOR CORP·Filed 2011·Granted Jan 29, 2013·28 cites·24 claims
- 1097US8270193B2Local bit lines and methods of selecting the same to access memory elements in cross-point arraysSIAU CHANG HUA·Filed 2010·Granted Sep 18, 2012·39 cites·23 claims
- 1196US11354067B2Asymmetric plane driver circuits in a multi-plane memory deviceMICRON TECHNOLOGY INC·Filed 2020·Granted Jun 7, 2022·4 cites·20 claims
- 1296US9472298B1Dynamic read valley search in non-volatile memorySANDISK TECHNOLOGIES INC·Filed 2015·Granted Oct 18, 2016·40 cites·20 claims
- 1396US9390796B2Global bit line pre-charge circuit that compensates for process, operating voltage, and temperature variationsUNITY SEMICONDUCTOR CORP·Filed 2015·Granted Jul 12, 2016·15 cites·20 claims
- 1496US8305796B2Access signal adjustment circuits and methods for memory cells in a cross-point arrayCHEVALLIER CHRISTOPHE·Filed 2012·Granted Nov 6, 2012·16 cites·28 claims
- 1595US9691480B2Global bit line pre-charge circuit that compensates for process, operating voltage, and temperature variationsUNITY SEMICONDUCTOR CORP·Filed 2016·Granted Jun 27, 2017·12 cites·19 claims
- 1695US7830701B2Contemporaneous margin verification and memory access for memory cells in cross point memory arraysUNITY SEMICONDUCTOR CORP·Filed 2008·Granted Nov 9, 2010·27 cites·17 claims
- 1794US9905307B1Leakage current detection in 3D memorySANDISK TECHNOLOGIES LLC·Filed 2016·Granted Feb 27, 2018·23 cites·20 claims
- 1894US7436723B2Method for two-cycle sensing in a two-terminal memory array having leakage currentUNITY SEMICONDUCTOR CORP·Filed 2008·Granted Oct 14, 2008·30 cites·25 claims
- 1993US9306549B2High voltage switching circuitry for a cross-point arrayUNITY SEMICONDUCTOR CORP·Filed 2015·Granted Apr 5, 2016·9 cites·20 claims
- 2093US8638584B2Memory architectures and techniques to enhance throughput for cross-point arraysCHEVALLIER CHRISTOPHE·Filed 2010·Granted Jan 28, 2014·22 cites·26 claims
- 2193US7505347B2Method for sensing a signal in a two-terminal memory array having leakage currentUNITY SEMICONDUCTOR CORP·Filed 2008·Granted Mar 17, 2009·26 cites·25 claims
- 2291US10650870B2Circuits and techniques to compensate memory access signals for variations of parameters in multiple layers of memoryUNITY SEMICONDUCTOR CORP·Filed 2019·Granted May 12, 2020·3 cites·20 claims
- 2391US9703719B2Fast read for non-volatile storageSANDISK TECHNOLOGIES INC·Filed 2015·Granted Jul 11, 2017·12 cites·20 claims
- 2491US8427868B2Circuits and techniques to compensate memory access signals for variations of parameters in multiple layers of memoryCHEVALLIER CHRISTOPHE J·Filed 2011·Granted Apr 23, 2013·10 cites·27 claims
- 2590US9595323B1Word line compensation for memory arraysSANDISK 3D LLC·Filed 2016·Granted Mar 14, 2017·14 cites·20 claims
- 2690US9384806B2Circuits and techniques to compensate memory access signals for variations of parameters in multiple layers of memoryUNITY SEMICONDUCTOR CORP·Filed 2015·Granted Jul 5, 2016·6 cites·20 claims
- 2790US9047928B2High voltage switching circuitry for a cross-point arrayUNITY SEMICONDUCTOR CORP·Filed 2014·Granted Jun 2, 2015·7 cites·20 claims
- 2890US8854881B2Circuits and techniques to compensate memory access signals for variations of parameters in multiple layers of memoryUNITY SEMICONDUCTOR CORP·Filed 2013·Granted Oct 7, 2014·7 cites·19 claims
- 2989US11437318B2Microelectronic devices including staircase structures, and related memory devices and electronic systemsMICRON TECHNOLOGY INC·Filed 2020·Granted Sep 6, 2022·2 cites·13 claims
- 3088US9536617B2Ad hoc digital multi-die polling for peak ICC managementSANDISK TECHNOLOGIES INC·Filed 2015·Granted Jan 3, 2017·10 cites·20 claims
- 3188US9318194B1Apparatus and methods for sensing hard bit and soft bitsSANDISK 3D LLC·Filed 2014·Granted Apr 19, 2016·9 cites·17 claims
- 3287US9997241B2High voltage switching circuitry for a cross-point arrayUNITY SEMICONDUCTOR CORP·Filed 2017·Granted Jun 12, 2018·4 cites·20 claims
- 3387US9870809B2Circuits and techniques to compensate memory access signals for variations of parameters in multiple layers of memoryUNITY SEMICONDUCTOR CORP·Filed 2016·Granted Jan 16, 2018·4 cites·20 claims
- 3487US8929126B2Array voltage regulating technique to enable data operations on large cross-point memory arrays with resistive memory elementsUNITY SEMICONDUCTOR CORP·Filed 2013·Granted Jan 6, 2015·5 cites·16 claims
- 3587US8351264B2High voltage switching circuitry for a cross-point arrayUNITY SEMICONDUCTOR CORP·Filed 2009·Granted Jan 8, 2013·10 cites·22 claims
- 3686US9720611B2Array voltage regulating technique to enable data operations on large memory arrays with resistive memory elementsUNITY SEMICONDUCTOR CORP·Filed 2016·Granted Aug 1, 2017·4 cites·23 claims
- 3785US10210917B2Circuits and techniques to compensate memory access signals for variations of parameters in multiple layers of memoryUNITY SEMICONDUCTOR CORP·Filed 2018·Granted Feb 19, 2019·3 cites·20 claims
- 3885US9959078B2Multi-die rolling status mode for non-volatile storageSANDISK TECHNOLOGIES INC·Filed 2015·Granted May 1, 2018·5 cites·20 claims
- 3985US9870823B2Global bit line pre-charge circuit that compensates for process, operating voltage, and temperature variationsUNITY SEMICONDUCTOR CORP·Filed 2017·Granted Jan 16, 2018·4 cites·6 claims
- 4085US8988930B2Access signal adjustment circuits and methods for memory cells in a cross-point arrayUNITY SEMICONDUCTOR CORP·Filed 2014·Granted Mar 24, 2015·4 cites·20 claims
- 4184US9704572B2Sense amplifier with integrating capacitor and methods of operationSANDISK TECHNOLOGIES LLC·Filed 2015·Granted Jul 11, 2017·7 cites·11 claims
- 4284US9514811B2Access signal adjustment circuits and methods for memory cells in a cross-point arrayUNITY SEMICONDUCTOR CORP·Filed 2016·Granted Dec 6, 2016·3 cites·20 claims
- 4384US9129668B2Circuits and techniques to compensate memory access signals for variations of parameters in multiple layers of memoryUNITY SEMICONDUCTOR CORP·Filed 2014·Granted Sep 8, 2015·4 cites·19 claims
- 4484US8654565B2Access signal adjustment circuits and methods for memory cells in a cross-point arrayUNITY SEMICONDUCTOR CORP·Filed 2012·Granted Feb 18, 2014·4 cites·27 claims
- 4583US8854888B2High voltage switching circuitry for a cross-point arrayUNITY SEMICONDUCTOR CORP·Filed 2012·Granted Oct 7, 2014·4 cites·19 claims
- 4683US8705260B2Circuits and techniques to compensate data signals for variations of parameters affecting memory cells in cross point arraysUNITY SEMICONDUCTOR CORP·Filed 2012·Granted Apr 22, 2014·4 cites·20 claims
- 4782US10788993B2Array voltage regulating technique to enable data operations on large memory arrays with resistive memory elementsUNITY SEMICONDUCTOR CORP·Filed 2020·Granted Sep 29, 2020·1 cites·20 claims
- 4882US9299427B2Access signal adjustment circuits and methods for memory cells in a cross-point arrayUNITY SEMICONDUCTOR CORP·Filed 2015·Granted Mar 29, 2016·3 cites·20 claims
- 4982US8897050B2Local bit lines and methods of selecting the same to access memory elements in cross-point arraysSIAU CHANG HUA·Filed 2012·Granted Nov 25, 2014·4 cites·28 claims
- 5081US8737151B2Low read current architecture for memoryBATEMAN BRUCE·Filed 2011·Granted May 27, 2014·6 cites·17 claims
Showing the top 50 of 112 patent records by PatentIndex Score.
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Identity basis: PatentsView inventor disambiguation (2025Q4-odp release). How scoring works →