Inventor · disambiguated record
Chenming W. Tung
Also filed as: TUNG CHENMING W
5 granted patents·1 pending application·109 citations·filing 1992–2015
83Inventor score
Top patents by PatentIndex Score
6 records- 0195US9135986B2Systems and methods of sectioned bit line memory arrays, including hierarchical and/or other featuresGSI TECHNOLOGY INC·Filed 2013·Granted Sep 15, 2015·25 cites·56 claims
- 0293US8693236B2Systems and methods of sectioned bit line memory arrays, including hierarchical and/or other featuresSHU LEELEAN·Filed 2012·Granted Apr 8, 2014·31 cites·159 claims
- 0391US8593860B2Systems and methods of sectioned bit line memory arraysSHU LEELEAN·Filed 2011·Granted Nov 26, 2013·26 cites·58 claims
- 0461US5355343AStatic random access memory with self timed bit line equalizationSHU LEE LEAN·Filed 1992·Granted Oct 11, 1994·22 cites·8 claims
- 0549US2016005458A1Systems and Methods of Sectioned Bit Line Memory Arrays, Including Hierarchical and/or Other FeaturesGSI TECHNOLOGY INC·Filed 2015·Application pending·0 cites
- 0645US6762973B2Data coherent logic for an SRAM deviceGIGA SEMICONDUCTOR INC·Filed 2002·Granted Jul 13, 2004·5 cites·19 claims
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Identity basis: PatentsView inventor disambiguation (2025Q4-odp release). How scoring works →