Inventor · disambiguated record
Chin-Kun Wang
Also filed as: WANG CHIN-KUN
19 granted patents·3 pending applications·549 citations·filing 1994–2025
94Inventor score
Top patents by PatentIndex Score
22 records- 0196US5679606Amethod of forming inter-metal-dielectric structureTAIWAN SEMICONDUCTOR MFG·Filed 1995·Granted Oct 21, 1997·361 cites·31 claims
- 0292US9876083B2Semiconductor devices, FinFET devices and methods of forming the sameTAIWAN SEMICONDUCTOR MFG CO LTD·Filed 2016·Granted Jan 23, 2018·10 cites·18 claims
- 0389US9362175B2Epitaxial growth of doped film for source and drain regionsTAIWAN SEMICONDUCTOR MFG·Filed 2014·Granted Jun 7, 2016·7 cites·20 claims
- 0488US8877592B2Epitaxial growth of doped film for source and drain regionsTAIWAN SEMICONDUCTOR MFG·Filed 2013·Granted Nov 4, 2014·7 cites·17 claims
- 0581US9312138B2Method for forming gate dielectric layerTAIWAN SEMICONDUCTOR MFG CO LTD·Filed 2015·Granted Apr 12, 2016·3 cites·20 claims
- 0680US2025362585A1Multilayer protection coating with layers of different functions on carbon nanotubeTAIWAN SEMICONDUCTOR MFG CO LTD·Filed 2025·Application pending·0 cites
- 0775US8041440B2Method and system for providing a selection of golden tools for better defect density and product yieldTAIWAN SEMICONDUCTOR MFG·Filed 2007·Granted Oct 18, 2011·4 cites·20 claims
- 0874US5552346APlanarization and etch back process for semiconductor layersTAIWAN SEMICONDUCTOR MFG·Filed 1995·Granted Sep 3, 1996·45 cites·17 claims
- 0972US2025085623A1Multilayer protection coating with layers of different functions on carbon nanotubeTAIWAN SEMICONDUCTOR MFG CO LTD·Filed 2024·Application pending·0 cites
- 1069US9064865B2Mechanisms for forming gate dielectric layerTAIWAN SEMICONDUCTOR MFG CO LTD·Filed 2013·Granted Jun 23, 2015·2 cites·20 claims
- 1167US5792705AOptimized planarization process for SOG filled viasTAIWAN SEMICONDUCTOR MFG·Filed 1997·Granted Aug 11, 1998·37 cites·20 claims
- 1267US5728631AMethod for forming a low capacitance dielectric layerTAIWAN SEMICONDUCTOR MFG·Filed 1995·Granted Mar 17, 1998·37 cites·14 claims
- 1364US2025284214A1Lithography system and methodsTAIWAN SEMICONDUCTOR MFG CO LTD·Filed 2024·Application pending·0 cites
- 1457US8946036B2Method of forming dielectric films using a plurality of oxidation gasesTAIWAN SEMICONDUCTOR MFG·Filed 2012·Granted Feb 3, 2015·1 cites·20 claims
- 1555US9583393B2Epitaxial growth of doped film for source and drain regionsTAIWAN SEMICONDUCTOR MFG CO LTD·Filed 2016·Granted Feb 28, 2017·0 cites·20 claims
- 1645US9306024B2Method of forming semiconductor deviceTAIWAN SEMICONDUCTOR MFG·Filed 2014·Granted Apr 5, 2016·0 cites·20 claims
- 1745US5567658AMethod for minimizing peeling at the surface of spin-on glassesTAIWAN SEMICONDUCTOR MFG·Filed 1994·Granted Oct 22, 1996·15 cites·28 claims
- 1844US5849637AIntegration of spin-on gap filling dielectric with W-plug without outgassingFiled 1996·Granted Dec 15, 1998·12 cites·8 claims
- 1943US9196718B2In-situ nitridation of gate dielectric for semiconductor devicesTAIWAN SEMICONDUCTOR MFG CO LTD·Filed 2013·Granted Nov 24, 2015·0 cites·21 claims
- 2042US9595593B2Semiconductor structure with interfacial layer and method for manufacturing the sameTAIWAN SEMICONDUCTOR MFG CO LTD·Filed 2015·Granted Mar 14, 2017·0 cites·14 claims
- 2141US5723380AMethod of approach to improve metal lithography and via-plug integrationTAIWAN SEMICONDUCTOR MFG·Filed 1996·Granted Mar 3, 1998·8 cites·20 claims
- 2239US8729645B2Substrate backside peeling controlTAIWAN SEMICONDUCTOR MFG·Filed 2012·Granted May 20, 2014·0 cites·20 claims
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Identity basis: PatentsView inventor disambiguation (2025Q4-odp release). How scoring works →