Inventor · disambiguated record
Ching-Jung Yang
Also filed as: YANG CHING H · YANG CHING-JUNG
71 granted patents·10 pending applications·262 citations·filing 1992–2025
99Inventor score
Files withTAIWAN SEMICONDUCTOR MFG CO LTD65YANG CHING-JUNG5TAIWAN SEMICONDUCTOR MFG4ADVANCED SEMICONDUCTOR ENG1CHEN HSIEN-WEI1
Top patents by PatentIndex Score
81 records- 0198US10840190B1Semiconductor structure and manufacturing method thereofTAIWAN SEMICONDUCTOR MFG CO LTD·Filed 2019·Granted Nov 17, 2020·24 cites·20 claims
- 0298US10504873B13DIC structure with protective structure and method of fabricating the same and packageTAIWAN SEMICONDUCTOR MFG CO LTD·Filed 2018·Granted Dec 10, 2019·24 cites·20 claims
- 0397US12205856B2Semiconductor structure including interconnection to probe pad with probe markTAIWAN SEMICONDUCTOR MFG CO LTD·Filed 2023·Granted Jan 21, 2025·2 cites·20 claims
- 0497US11362064B2Semiconductor package with shared barrier layer in redistribution and viaTAIWAN SEMICONDUCTOR MFG CO LTD·Filed 2020·Granted Jun 14, 2022·4 cites·20 claims
- 0597US10867968B23DIC structure with protective structure and method of fabricating the sameTAIWAN SEMICONDUCTOR MFG CO LTD·Filed 2019·Granted Dec 15, 2020·16 cites·20 claims
- 0696US12374652B2Packages for semiconductor devices, packaged semiconductor devices, and methods of packaging semiconductor devicesTAIWAN SEMICONDUCTOR MFG CO LTD·Filed 2022·Granted Jul 29, 2025·2 cites·20 claims
- 0796US11251157B2Die stack structure with hybrid bonding structure and method of fabricating the same and packageTAIWAN SEMICONDUCTOR MFG CO LTD·Filed 2018·Granted Feb 15, 2022·12 cites·20 claims
- 0896US9640498B1Integrated fan-out (InFO) package structures and methods of forming sameTAIWAN SEMICONDUCTOR MFG CO LTD·Filed 2015·Granted May 2, 2017·20 cites·20 claims
- 0996US9627332B1Integrated circuit structure and seal ring structureTAIWAN SEMICONDUCTOR MFG CO LTD·Filed 2016·Granted Apr 18, 2017·22 cites·20 claims
- 1095US11837579B2Semiconductor structureTAIWAN SEMICONDUCTOR MFG CO LTD·Filed 2021·Granted Dec 5, 2023·2 cites·20 claims
- 1195US9773732B2Method and apparatus for packaging pad structureTAIWAN SEMICONDUCTOR MFG CO LTD·Filed 2013·Granted Sep 26, 2017·16 cites·20 claims
- 1294US11769704B2Semiconductor structure having an anti-arcing pattern disposed on a passivation layer and a post passivation layer disposed on the anti-arcing patternTAIWAN SEMICONDUCTOR MFG CO LTD·Filed 2022·Granted Sep 26, 2023·2 cites·20 claims
- 1393US11335610B2Semiconductor structure including interconnection to probe pad with probe mark and method of manufacturing the sameTAIWAN SEMICONDUCTOR MFG CO LTD·Filed 2020·Granted May 17, 2022·2 cites·20 claims
- 1493US9153504B2Metal insulator metal capacitor and method for making the sameTAIWAN SEMICONDUCTOR MFG·Filed 2013·Granted Oct 6, 2015·13 cites·20 claims
- 1592US11532598B2Package structure with protective structure and method of fabricating the sameTAIWAN SEMICONDUCTOR MFG CO LTD·Filed 2020·Granted Dec 20, 2022·2 cites·20 claims
- 1691US11417599B2Plurality of different size metal layers for a pad structureTAIWAN SEMICONDUCTOR MFG CO LTD·Filed 2020·Granted Aug 16, 2022·2 cites·20 claims
- 1790US10998293B2Method of fabricating semiconductor structureTAIWAN SEMICONDUCTOR MFG CO LTD·Filed 2019·Granted May 4, 2021·4 cites·20 claims
- 1890US8618827B2Measurement of electrical and mechanical characteristics of low-K dielectric in a semiconductor deviceSHAO TUNG-LIANG·Filed 2010·Granted Dec 31, 2013·12 cites·20 claims
- 1989US11251100B2Semiconductor structure having an anti-arcing pattern disposed on a passivation layer and method of fabricating the semiconductor structureTAIWAN SEMICONDUCTOR MFG CO LTD·Filed 2020·Granted Feb 15, 2022·2 cites·20 claims
- 2089US10276496B2Plurality of different size metal layers for a pad structureTAIWAN SEMICONDUCTOR MFG CO LTD·Filed 2017·Granted Apr 30, 2019·4 cites·20 claims
- 2189US2025336895A1Method of forming semiconductor structureTAIWAN SEMICONDUCTOR MFG CO LTD·Filed 2025·Application pending·0 cites
- 2289US2025309123A1Semiconductor structure and manufacturing method thereofTAIWAN SEMICONDUCTOR MFG CO LTD·Filed 2025·Application pending·0 cites
- 2386US8237160B2Probe pad on a corner stress relief region in a semiconductor chipCHEN HSIEN-WEI·Filed 2011·Granted Aug 7, 2012·8 cites·20 claims
- 2485US10658290B2Plurality of different size metal layers for a pad structureTAIWAN SEMICONDUCTOR MFG CO LTD·Filed 2019·Granted May 19, 2020·2 cites·20 claims
- 2585US9947630B2Package with solder regions aligned to recessesTAIWAN SEMICONDUCTOR MFG CO LTD·Filed 2017·Granted Apr 17, 2018·3 cites·20 claims
- 2685US9048149B2Self-alignment structure for wafer level chip scale packageTAIWAN SEMICONDUCTOR MFG CO LTD·Filed 2013·Granted Jun 2, 2015·6 cites·20 claims
- 2784US2024395774A1Package structure and method of forming the sameTAIWAN SEMICONDUCTOR MFG CO LTD·Filed 2024·Application pending·0 cites
- 2883US12444714B2Semiconductor structureTAIWAN SEMICONDUCTOR MFG CO LTD·Filed 2023·Granted Oct 14, 2025·0 cites·20 claims
- 2983US11121084B2Integrated circuit device with through interconnect via and methods of manufacturing the sameTAIWAN SEMICONDUCTOR MFG CO LTD·Filed 2019·Granted Sep 14, 2021·3 cites·20 claims
- 3083US10879138B1Semiconductor packaging structure including interconnection to probe pad with probe mark and method of manufacturing the sameTAIWAN SEMICONDUCTOR MFG CO LTD·Filed 2019·Granted Dec 29, 2020·2 cites·20 claims
- 3183US2025069975A1Semiconductor structure having an anti-arcing pattern disposed on a passivation layerTAIWAN SEMICONDUCTOR MFG CO LTD·Filed 2024·Application pending·0 cites
- 3283US2024332261A1Package structure and method of forming the sameTAIWAN SEMICONDUCTOR MFG CO LTD·Filed 2024·Application pending·0 cites
- 3382US12278199B2Conductive bump of a semiconductor device and fabricating method thereof cross reference to related applicationsTAIWAN SEMICONDUCTOR MFG CO LTD·Filed 2023·Granted Apr 15, 2025·0 cites·20 claims
- 3482US10354986B2Hollow metal pillar packaging schemeTAIWAN SEMICONDUCTOR MFG CO LTD·Filed 2017·Granted Jul 16, 2019·2 cites·20 claims
- 3582US9559044B2Package with solder regions aligned to recessesTAIWAN SEMICONDUCTOR MFG CO LTD·Filed 2013·Granted Jan 31, 2017·4 cites·20 claims
- 3682US2025118711A1Semiconductor package with shared barrier layer in redistribution and viaTAIWAN SEMICONDUCTOR MFG CO LTD·Filed 2024·Application pending·0 cites
- 3782US2023352414A1Semiconductor device and manufacturing method thereofTAIWAN SEMICONDUCTOR MFG CO LTD·Filed 2023·Application pending·0 cites
- 3881US10985121B2Bump structure and fabricating method thereofTAIWAN SEMICONDUCTOR MFG CO LTD·Filed 2018·Granted Apr 20, 2021·2 cites·20 claims
- 3981US10636757B2Integrated circuit component package and method of fabricating the sameTAIWAN SEMICONDUCTOR MFG CO LTD·Filed 2017·Granted Apr 28, 2020·3 cites·19 claims
- 4081US9786618B2Semiconductor structure and manufacturing method thereofTAIWAN SEMICONDUCTOR MFG CO LTD·Filed 2015·Granted Oct 10, 2017·3 cites·20 claims
- 4181US9461106B1MIM capacitor and method forming the sameTAIWAN SEMICONDUCTOR MFG CO LTD·Filed 2015·Granted Oct 4, 2016·4 cites·20 claims
- 4280US12176257B2Semiconductor structure having an anti-arcing pattern disposed on a passivation layerTAIWAN SEMICONDUCTOR MFG CO LTD·Filed 2023·Granted Dec 24, 2024·0 cites·20 claims
- 4380US8810025B2Reinforcement structure for flip-chip packagingLIU YU-WEN·Filed 2011·Granted Aug 19, 2014·6 cites·17 claims
- 4479US11784124B2Plurality of different size metal layers for a pad structureTAIWAN SEMICONDUCTOR MFG CO LTD·Filed 2022·Granted Oct 10, 2023·0 cites·20 claims
- 4579US8963328B2Reducing delamination between an underfill and a buffer layer in a bond structureTAIWAN SEMICONDUCTOR MFG·Filed 2013·Granted Feb 24, 2015·4 cites·19 claims
- 4678US12362282B2Semiconductor structure and manufacturing method thereofTAIWAN SEMICONDUCTOR MFG CO LTD·Filed 2022·Granted Jul 15, 2025·0 cites·20 claims
- 4778US9646944B2Alignment structures and methods of forming sameTAIWAN SEMICONDUCTOR MFG CO LTD·Filed 2016·Granted May 9, 2017·2 cites·20 claims
- 4877US11682594B2Semiconductor structure including interconnection to probe pad with probe markTAIWAN SEMICONDUCTOR MFG CO LTD·Filed 2022·Granted Jun 20, 2023·0 cites·20 claims
- 4977US10269737B2Method for manufacturing semiconductor structureTAIWAN SEMICONDUCTOR MFG CO LTD·Filed 2017·Granted Apr 23, 2019·2 cites·20 claims
- 5076US12322728B2Method of manufacturing die stack structureTAIWAN SEMICONDUCTOR MFG CO LTD·Filed 2022·Granted Jun 3, 2025·0 cites·20 claims
Showing the top 50 of 81 patent records by PatentIndex Score.
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Identity basis: PatentsView inventor disambiguation (2025Q4-odp release). How scoring works →