Inventor · disambiguated record
Chihong Zhang
Also filed as: ZHANG CHIHONG
18 granted patents·1 pending application·78 citations·filing 2007–2022
91Inventor score
Top patents by PatentIndex Score
19 records- 0195US11204765B1Deferred GPR allocation for texture/load instruction blockQUALCOMM INC·Filed 2020·Granted Dec 21, 2021·8 cites·20 claims
- 0293US9799094B1Per-instance preamble for graphics processingQUALCOMM INC·Filed 2016·Granted Oct 24, 2017·28 cites·30 claims
- 0393US9626234B2Inter-processor communication techniques in a multiple-processor computing platformQUALCOMM INC·Filed 2014·Granted Apr 18, 2017·18 cites·26 claims
- 0484US9645866B2Inter-processor communication techniques in a multiple-processor computing platformBOURD ALEXEI V·Filed 2011·Granted May 9, 2017·7 cites·40 claims
- 0579US11132760B2Graphics instruction operands aliasQUALCOMM INC·Filed 2019·Granted Sep 28, 2021·2 cites·20 claims
- 0678US8937622B2Inter-processor communication techniques in a multiple-processor computing platformBOURD ALEXEI V·Filed 2011·Granted Jan 20, 2015·4 cites·44 claims
- 0770US8732679B2Loop transformation for computer compiler optimizationUDAYAKUMARAN SUMESH·Filed 2010·Granted May 20, 2014·4 cites·20 claims
- 0868US8495602B2Shader compile system and methodCHEN LIN·Filed 2007·Granted Jul 23, 2013·5 cites·18 claims
- 0961US9747104B2Utilizing pipeline registers as intermediate storageQUALCOMM INC·Filed 2014·Granted Aug 29, 2017·1 cites·24 claims
- 1060US12067666B2Run-time mechanism for optimal shaderQUALCOMM INC·Filed 2022·Granted Aug 20, 2024·0 cites·30 claims
- 1157US8379032B2System and method of mapping shader variables into physical registersQUALCOMM INC·Filed 2007·Granted Feb 19, 2013·1 cites·21 claims
- 1255US12229864B2Runtime mechanism to optimize shader execution flowQUALCOMM INC·Filed 2022·Granted Feb 18, 2025·0 cites·28 claims
- 1355US11657471B2Methods and apparatus for constant data storageQUALCOMM INC·Filed 2021·Granted May 23, 2023·0 cites·25 claims
- 1453US12056790B2Methods and apparatus to facilitate a dedicated bindless state processorQUALCOMM INC·Filed 2020·Granted Aug 6, 2024·0 cites·18 claims
- 1549US9665370B2Skipping of data storageQUALCOMM INC·Filed 2014·Granted May 30, 2017·0 cites·16 claims
- 1648US11094103B2General purpose register and wave slot allocation in graphics processingQUALCOMM INC·Filed 2019·Granted Aug 17, 2021·0 cites·18 claims
- 1742US10558460B2General purpose register allocation in streaming processorQUALCOMM INC·Filed 2016·Granted Feb 11, 2020·0 cites·30 claims
- 1840US2012284701A1Efficient conditional flow control compilationTSAI MING-CHANG·Filed 2011·Application pending·0 cites
- 1937US9256408B2Optimizing texture commands for graphics processing unitZHANG WEIFENG·Filed 2012·Granted Feb 9, 2016·0 cites·40 claims
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Identity basis: PatentsView inventor disambiguation (2025Q4-odp release). How scoring works →