Inventor · disambiguated record
Clifford L. Ong
Also filed as: ONG CLIFFORD · ONG CLIFFORD L · ONG CLIFFORD LU
11 granted patents·15 pending applications·10 citations·filing 2009–2024
82Inventor score
Files withINTEL CORP26
Top patents by PatentIndex Score
26 records- 0179US2025071963A1Uniform layouts for sram and register file bit cellsINTEL CORP·Filed 2024·Application pending·0 cites
- 0278US12171090B2Uniform layouts for SRAM and register file bit cellsINTEL CORP·Filed 2023·Granted Dec 17, 2024·0 cites·6 claims
- 0378US11737253B2Uniform layouts for SRAM and register file bit cellsINTEL CORP·Filed 2017·Granted Aug 22, 2023·2 cites·8 claims
- 0478US10600476B2Row based memory write assist and active sleep biasINTEL CORP·Filed 2018·Granted Mar 24, 2020·2 cites·20 claims
- 0566US8362806B2Keeper circuitINTEL CORP·Filed 2009·Granted Jan 29, 2013·6 cites·13 claims
- 0664US2024113111A1Integrated circuit structures having fin isolation regions recessed for gate contactINTEL CORP·Filed 2022·Application pending·0 cites
- 0760US10957386B2Row based memory write assist and active sleep biasINTEL CORP·Filed 2020·Granted Mar 23, 2021·0 cites·20 claims
- 0859US12501661B2Integrated circuit structures having differentiated channel sizingINTEL CORP·Filed 2022·Granted Dec 16, 2025·0 cites·20 claims
- 0959US2023178622A1Gate-all-around integrated circuit structures having depopulated channel structures using directed bottom-up approachINTEL CORP·Filed 2021·Application pending·0 cites
- 1057US12484207B2SRAM with channel count contrast for greater read stabilityINTEL CORP·Filed 2021·Granted Nov 25, 2025·0 cites·17 claims
- 1156US12444685B2Backside electrical contact for PMOS epitaxial voltage supplyINTEL CORP·Filed 2022·Granted Oct 14, 2025·0 cites·25 claims
- 1256US12052873B2Neural computing dies with stacked neural core regionsINTEL CORP·Filed 2020·Granted Jul 30, 2024·0 cites·20 claims
- 1356US2022253285A1Binary-weighted capacitor charge-sharing for multiplicationINTEL CORP·Filed 2022·Application pending·0 cites
- 1455US12009026B2Precise writing of multi-level weights to memory devices for compute-in-memoryINTEL CORP·Filed 2020·Granted Jun 11, 2024·0 cites·20 claims
- 1555US2025176153A1Integrated circuit structures having uniform grid metal gate and trench contact cut with channel depopulationINTEL CORP·Filed 2023·Application pending·0 cites
- 1651US2023317148A1Epitaxial layers of a transistor electrically coupled with a backside contact metalINTEL CORP·Filed 2022·Application pending·0 cites
- 1751US2025220969A1Gate-all-around devices with different gate lengthsINTEL CORP·Filed 2023·Application pending·0 cites
- 1850US2023320057A1Recessed transistor terminal via jumpersINTEL CORP·Filed 2022·Application pending·0 cites
- 1950US2023056640A1Stacked random-access memory devicesINTEL CORP·Filed 2021·Application pending·0 cites
- 2049US2024071913A1Double-decked interconnect featuresINTEL CORP·Filed 2022·Application pending·0 cites
- 2149US2023084182A1Selective depopulation of gate-all-around semiconductor devicesINTEL CORP·Filed 2021·Application pending·0 cites
- 2248US2023079586A1Selectively thinned gate-all-around (gaa) structuresINTEL CORP·Filed 2021·Application pending·0 cites
- 2348US2023209797A1Sram with nanoribbon width modulation for greater read stabilityINTEL CORP·Filed 2021·Application pending·0 cites
- 2446US2023209799A1Sram with dipole dopant threshold voltage modulation for greater read stabilityINTEL CORP·Filed 2021·Application pending·0 cites
- 2543US2024008239A1Stacked sram with shared wordline connectionINTEL CORP·Filed 2022·Application pending·0 cites
- 2641US11152060B2Multi-bit read-only memory deviceINTEL CORP·Filed 2019·Granted Oct 19, 2021·0 cites·8 claims
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Identity basis: PatentsView inventor disambiguation (2025Q4-odp release). How scoring works →