Inventor · disambiguated record
Conrado Blasco
Also filed as: BLASCO CONRADO
27 granted patents·15 pending applications·80 citations·filing 2013–2025
94Inventor score
Top patents by PatentIndex Score
42 records- 0193US10838729B1System and method for predicting memory dependence when a source register of a push instruction matches the destination register of a pop instructionAPPLE INC·Filed 2018·Granted Nov 17, 2020·16 cites·17 claims
- 0291US11468168B1Systems and methods for optimizing authentication branch instructionsAPPLE INC·Filed 2017·Granted Oct 11, 2022·10 cites·20 claims
- 0391US10223123B1Methods for partially saving a branch predictor stateAPPLE INC·Filed 2016·Granted Mar 5, 2019·10 cites·20 claims
- 0490US10719327B1Branch prediction systemAPPLE INC·Filed 2015·Granted Jul 21, 2020·10 cites·18 claims
- 0589US11449343B2Indirect branch predictor storing encrypted branch information fields and security tag for security protectionAPPLE INC·Filed 2018·Granted Sep 20, 2022·5 cites·20 claims
- 0689US11379240B2Indirect branch predictor based on register operandsAPPLE INC·Filed 2020·Granted Jul 5, 2022·3 cites·20 claims
- 0786US10901484B2Fetch predition circuit for reducing power consumption in a processorAPPLE INC·Filed 2019·Granted Jan 26, 2021·3 cites·20 claims
- 0886US9639369B2Split register file for operands of different sizesAPPLE INC·Filed 2013·Granted May 2, 2017·11 cites·20 claims
- 0985US2025378157A1Systems and Methods for Optimizing Authentication Branch InstructionsAPPLE INC·Filed 2025·Application pending·0 cites
- 1079US10175982B1Storing taken branch informationAPPLE INC·Filed 2016·Granted Jan 8, 2019·3 cites·20 claims
- 1177US9952863B1Program counter capturingAPPLE INC·Filed 2015·Granted Apr 24, 2018·3 cites·16 claims
- 1273US12423408B1Systems and methods for optimizing authentication branch instructionsAPPLE INC·Filed 2022·Granted Sep 23, 2025·0 cites·20 claims
- 1373US12373217B2Indirect branch predictor storing encrypted branch information fieldsAPPLE INC·Filed 2022·Granted Jul 29, 2025·0 cites·20 claims
- 1472US12367157B2Compressing translation lookaside buffer (TLB) tags using a TLB metadata buffer in processor-based devicesQUALCOMM INC·Filed 2024·Granted Jul 22, 2025·0 cites·17 claims
- 1572US2025231767A1Program Counter Zero-Cycle LoadsAPPLE INC·Filed 2025·Application pending·0 cites
- 1671US2025328471A1Technique for prefetching with a pointer prefetcherQUALCOMM INC·Filed 2025·Application pending·0 cites
- 1770US12130751B2Compressing translation lookaside buffer (TLB) tags using a TLB metadata buffer in processor-based devicesQUALCOMM INC·Filed 2023·Granted Oct 29, 2024·0 cites·20 claims
- 1870US2024273035A1Exploiting virtual address (va) spatial locality using translation lookaside buffer (tlb) entry compression in processor-based devicesQUALCOMM INC·Filed 2024·Application pending·0 cites
- 1969US10241557B2Reducing power consumption in a processorAPPLE INC·Filed 2013·Granted Mar 26, 2019·2 cites·20 claims
- 2068US12436771B2Performing fused shift and logical operations in processor-based devicesQUALCOMM INC·Filed 2023·Granted Oct 7, 2025·0 cites·22 claims
- 2168US10452434B1Hierarchical reservation stationAPPLE INC·Filed 2017·Granted Oct 22, 2019·1 cites·20 claims
- 2267US9940262B2Immediate branch recode that handles aliasingAPPLE INC·Filed 2014·Granted Apr 10, 2018·2 cites·18 claims
- 2367US2023176977A1Throttling schemes in multicore microprocessorsQUALCOMM INC·Filed 2023·Application pending·0 cites
- 2466US2025199997A1Implementing asymmetric processor cores to enable higher operating frequencies in processor-based devicesQUALCOMM INC·Filed 2024·Application pending·0 cites
- 2566US2025278279A1Performing fused shift and logical operations in processor-based devicesQUALCOMM INC·Filed 2025·Application pending·0 cites
- 2665US12288070B1Program counter zero-cycle loadsAPPLE INC·Filed 2022·Granted Apr 29, 2025·0 cites·19 claims
- 2765US2024273033A1Exploiting virtual address (va) spatial locality using translation lookaside buffer (tlb) entry compression in processor-based devicesQUALCOMM INC·Filed 2023·Application pending·0 cites
- 2864US2025199996A1Implementing asymmetric processor cores to enable higher operating frequencies in processor-based devicesQUALCOMM INC·Filed 2023·Application pending·0 cites
- 2963US2024241951A1Mitigating pointer authentication code (pac) attacks in processor-based devicesQUALCOMM INC·Filed 2024·Application pending·0 cites
- 3062US9471322B2Early loop buffer mode entry upon number of mispredictions of exit condition exceeding thresholdAPPLE INC·Filed 2014·Granted Oct 18, 2016·1 cites·20 claims
- 3162US2022365879A1Throttling Schemes in Multicore MicroprocessorsNUVIA INC·Filed 2022·Application pending·0 cites
- 3257US11093249B2Methods for partially preserving a branch predictor stateAPPLE INC·Filed 2019·Granted Aug 17, 2021·0 cites·20 claims
- 3355US11200062B2History file for previous register mapping storage and last reference indicationAPPLE INC·Filed 2019·Granted Dec 14, 2021·0 cites·20 claims
- 3453US11914524B2Latency management in synchronization eventsQUALCOMM INC·Filed 2022·Granted Feb 27, 2024·0 cites·19 claims
- 3551US11416254B2Zero cycle load bypass in a decode groupAPPLE INC·Filed 2019·Granted Aug 16, 2022·0 cites·20 claims
- 3651US10838723B1Speculative writes to special-purpose registerAPPLE INC·Filed 2019·Granted Nov 17, 2020·0 cites·20 claims
- 3749US9501284B2Mechanism for allowing speculative execution of loads beyond a wait for event instructionAPPLE INC·Filed 2014·Granted Nov 22, 2016·0 cites·20 claims
- 3848US2024385841A1Fetching beyond predicted-taken branch instructions in fetch bundles of processor-based devicesQUALCOMM INC·Filed 2024·Application pending·0 cites
- 3947US10867031B2Marking valid return targetsAPPLE INC·Filed 2015·Granted Dec 15, 2020·0 cites·20 claims
- 4046US2024427599A1Providing physical register (pr) swap memory renaming in processor-based devicesQUALCOMM INC·Filed 2023·Application pending·0 cites
- 4146US2024264949A1Using retired pages history for instruction translation lookaside buffer (tlb) prefetching in processor-based devicesQUALCOMM INC·Filed 2024·Application pending·0 cites
- 4245US2023064603A1System and methods for invalidating translation information in cachesNUVIA INC·Filed 2022·Application pending·0 cites
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Identity basis: PatentsView inventor disambiguation (2025Q4-odp release). How scoring works →