Inventor · disambiguated record
Craig Hall
Also filed as: HALL CRAIG · HALL CRAIG LAWRENCE
2 granted patents·2 pending applications·9 citations·filing 2005–2008
47Inventor score
Top patents by PatentIndex Score
4 records- 0178US7514309B2Methods to selectively protect NMOS regions, PMOS regions, and gate layers during EPI processTEXAS INSTRUMENTS INC·Filed 2005·Granted Apr 7, 2009·9 cites·9 claims
- 0241US2008248640A1Method for reducing polysilicon gate defects in semiconductor devicesTEXAS INSTRUMENTS INC·Filed 2007·Application pending·0 cites
- 0340US2008283935A1Trench isolation structure and method of manufacture thereforTEXAS INSTRUMENTS INC·Filed 2007·Application pending·0 cites
- 0434US9006001B2Simple scatterometry structure for Si recess etch controlUKRAINTSEV VLADIMIR ALEXEEVICH·Filed 2008·Granted Apr 14, 2015·0 cites·20 claims
Join the waitlist — get patent alerts
Get an alert when Craig Hall files or is granted a new patent.
We store only your email — no account needed. See our privacy policy.
Identity basis: PatentsView inventor disambiguation (2025Q4-odp release). How scoring works →