Inventor · disambiguated record
Craig D. Keefer
Also filed as: KEEFER CRAIG D · KEEFER CRAIG DURAND
6 granted patents·1 pending application·404 citations·filing 1996–2023
88Inventor score
Technology areasG06F
Top patents by PatentIndex Score
7 records- 0191US6353877B1Performance optimization and system bus duty cycle reduction by I/O bridge partial cache line writeCOMPAQ COMPUTER CORP·Filed 2000·Granted Mar 5, 2002·70 cites·14 claims
- 0290US5953538AMethod and apparatus providing DMA transfers between devices coupled to different host bus bridgesDIGITAL EQUIPMENT CORP·Filed 1996·Granted Sep 14, 1999·179 cites·15 claims
- 0382US11586514B2High reliability fault tolerant computer architectureSTRATUS TECH IRELAND LTD·Filed 2019·Granted Feb 21, 2023·4 cites·20 claims
- 0471US6249520B1High-performance non-blocking switch with multiple channel ordering constraintsCOMPAQ COMPUTER CORP·Filed 1997·Granted Jun 19, 2001·63 cites·46 claims
- 0569US6012120AMethod and apparatus for providing DMA transfers between devices coupled to different host bus bridgesDIGITAL EQUIPMENT CORP·Filed 1999·Granted Jan 4, 2000·54 cites·16 claims
- 0663US2023185681A1High reliability fault tolerant computer architectureSTRATUS TECH IRELAND LTD·Filed 2023·Application pending·0 cites
- 0760US6128711APerformance optimization and system bus duty cycle reduction by I/O bridge partial cache line writesCOMPAQ COMPUTER CORP·Filed 1996·Granted Oct 3, 2000·34 cites·3 claims
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Identity basis: PatentsView inventor disambiguation (2025Q4-odp release). How scoring works →