Inventor · disambiguated record
Curtis R. Mcallister
Also filed as: MCALLISTER CURTIS · MCALLISTER CURTIS R · MCALLISTER CURTIS ROGER
19 granted patents·484 citations·filing 1990–2024
95Inventor score
Files withHEWLETT PACKARD DEVELOPMENT CO9ELIYAN CORP3HEWLETT PACKARD CO3QUALCOMM INC2SUN MICROSYSTEMS INC2
Top patents by PatentIndex Score
19 records- 0194US7454631B1Method and apparatus for controlling power consumption in multiprocessor chipSUN MICROSYSTEMS INC·Filed 2005·Granted Nov 18, 2008·44 cites·17 claims
- 0294US6073223AMemory controller and method for intermittently activating and idling a clock signal for a synchronous memoryHEWLETT PACKARD CO·Filed 1997·Granted Jun 6, 2000·132 cites·17 claims
- 0389US12248413B1Universal memory interface utilizing die-to-die (D2D) interfaces between chipletsELIYAN CORP·Filed 2024·Granted Mar 11, 2025·1 cites·24 claims
- 0485US6611906B1Self-organizing hardware processing entities that cooperate to execute requestsHEWLETT PACKARD DEVELOPMENT CO·Filed 2000·Granted Aug 26, 2003·53 cites·10 claims
- 0585US5347634ASystem and method for directly executing user DMA instruction from user controlled process by employing processor privileged work buffer pointersHEWLETT PACKARD CO·Filed 1990·Granted Sep 13, 1994·116 cites·48 claims
- 0679US6651124B1Method and apparatus for preventing deadlock in a distributed shared memory systemHEWLETT PACKARD DEVELOPMENT CO·Filed 2000·Granted Nov 18, 2003·25 cites·16 claims
- 0778US6463506B1Arrangement of data within cache lines so that tags are first data receivedHEWLETT PACKARD CO·Filed 2000·Granted Oct 8, 2002·24 cites·16 claims
- 0876US12204468B1Universal memory interface with dynamic bidirectional data transfersELIYAN CORP·Filed 2024·Granted Jan 21, 2025·0 cites·20 claims
- 0974US6865634B2Method and apparatus for deadlock prevention in a distributed shared memory systemHEWLETT PACKARD DEVELOPMENT CO·Filed 2003·Granted Mar 8, 2005·17 cites·6 claims
- 1073US6671792B1Share masks and alias for directory coherencyHEWLETT PACKARD DEVELOPMENT CO·Filed 2000·Granted Dec 30, 2003·17 cites·10 claims
- 1172US6598140B1Memory controller having separate agents that process memory transactions in parallelHEWLETT PACKARD DEVELOPMENT CO·Filed 2000·Granted Jul 22, 2003·20 cites·12 claims
- 1269US7532003B1Method and apparatus for setting VDD on a per chip basisSUN MICROSYSTEMS INC·Filed 2006·Granted May 12, 2009·7 cites·20 claims
- 1367US11658577B2Power management integrated circuit with a field programmable array of voltage regulatorsQUALCOMM INC·Filed 2021·Granted May 23, 2023·0 cites·20 claims
- 1464US11671017B2Current balancing for voltage regulator units in field programmable arraysQUALCOMM INC·Filed 2021·Granted Jun 6, 2023·0 cites·20 claims
- 1561US7028150B2Arrangement of data within cache lines so that tags are first data receivedHEWLETT PACKARD DEVELOPMENT CO·Filed 2002·Granted Apr 11, 2006·7 cites·10 claims
- 1661US6928520B2Memory controller that provides memory line caching and memory transaction coherency by using at least one memory controller agentHEWLETT PACKARD DEVELOPMENT CO·Filed 2003·Granted Aug 9, 2005·8 cites·17 claims
- 1761US6564306B2Apparatus and method for performing speculative cache directory tag updatesHEWLETT PACKARD DEVELOPMENT CO·Filed 2001·Granted May 13, 2003·11 cites·9 claims
- 1858US12182040B1Multi-chip module (MCM) with scalable high bandwidth memoryELIYAN CORP·Filed 2023·Granted Dec 31, 2024·0 cites·18 claims
- 1952US6785778B2Share masks and alias for directory coherencyHEWLETT PACKARD DEVELOPMENT CO·Filed 2003·Granted Aug 31, 2004·2 cites·10 claims
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Identity basis: PatentsView inventor disambiguation (2025Q4-odp release). How scoring works →