Inventor · disambiguated record
Curtis Tsai
Also filed as: TSAI CURTIS
28 granted patents·5 pending applications·119 citations·filing 1995–2025
96Inventor score
Top patents by PatentIndex Score
33 records- 0194US9159734B2Antifuse element utilizing non-planar topologyHAFEZ WALID M·Filed 2011·Granted Oct 13, 2015·21 cites·23 claims
- 0294US8981481B2High voltage three-dimensional devices having dielectric linersHAFEZ WALID M·Filed 2012·Granted Mar 17, 2015·12 cites·15 claims
- 0393US9972642B2High voltage three-dimensional devices having dielectric linersINTEL CORP·Filed 2017·Granted May 15, 2018·5 cites·20 claims
- 0492US10096599B2Methods of integrating multiple gate dielectric transistors on a tri-gate (finFET) processINTEL CORP·Filed 2015·Granted Oct 9, 2018·7 cites·6 claims
- 0592US9786783B2Transistor architecture having extended recessed spacer and source/drain regions and method of making sameINTEL CORP·Filed 2013·Granted Oct 10, 2017·16 cites·25 claims
- 0691US8796772B2Precision resistor for non-planar semiconductor device architectureYEH JENG-YA D·Filed 2012·Granted Aug 5, 2014·14 cites·24 claims
- 0791US2025031446A1High voltage three-dimensional devices having dielectric linersINTEL CORP·Filed 2024·Application pending·0 cites
- 0888US12136628B2High voltage three-dimensional devices having dielectric linersINTEL CORP·Filed 2023·Granted Nov 5, 2024·0 cites·20 claims
- 0987US9570467B2High voltage three-dimensional devices having dielectric linersHAFEZ WALID M·Filed 2015·Granted Feb 14, 2017·3 cites·5 claims
- 1086US8889508B2Precision resistor for non-planar semiconductor device architectureYEH JENG-YA D·Filed 2014·Granted Nov 18, 2014·8 cites·6 claims
- 1185US11881486B2High voltage three-dimensional devices having dielectric linersINTEL CORP·Filed 2023·Granted Jan 23, 2024·0 cites·20 claims
- 1282US10229866B2On-chip through-body-via capacitors and techniques for forming sameINTEL CORP·Filed 2015·Granted Mar 12, 2019·4 cites·20 claims
- 1381US12166031B2Substrate-less electrostatic discharge (ESD) integrated circuit structuresINTEL CORP·Filed 2020·Granted Dec 10, 2024·1 cites·20 claims
- 1480US11610917B2High voltage three-dimensional devices having dielectric linersINTEL CORP·Filed 2022·Granted Mar 21, 2023·0 cites·25 claims
- 1580US9748252B2Antifuse element utilizing non-planar topologyINTEL CORP·Filed 2015·Granted Aug 29, 2017·3 cites·20 claims
- 1676US12471354B2Dipole threshold voltage tuning for high voltage transistor stacksINTEL CORP·Filed 2020·Granted Nov 11, 2025·1 cites·20 claims
- 1775US11251201B2High voltage three-dimensional devices having dielectric linersINTEL CORP·Filed 2020·Granted Feb 15, 2022·0 cites·20 claims
- 1874US10847544B2High voltage three-dimensional devices having dielectric linersINTEL CORP·Filed 2020·Granted Nov 24, 2020·0 cites·20 claims
- 1971US11695008B2Methods of integrating multiple gate dielectric transistors on a tri-gate (FINFET) processINTEL CORP·Filed 2020·Granted Jul 4, 2023·0 cites·9 claims
- 2071US2025254993A1Substrate-free integrated circuit structuresINTEL CORP·Filed 2025·Application pending·0 cites
- 2170US9520494B2Vertical non-planar semiconductor device for system-on-chip (SoC) applicationsINTEL CORP·Filed 2013·Granted Dec 13, 2016·2 cites·22 claims
- 2268US2025227968A1Integrated circuit structure with backside power deliveryINTEL CORP·Filed 2025·Application pending·0 cites
- 2366US10692888B2High voltage three-dimensional devices having dielectric linersINTEL CORP·Filed 2018·Granted Jun 23, 2020·0 cites·14 claims
- 2464US12317590B2Substrate-free integrated circuit structuresINTEL CORP·Filed 2020·Granted May 27, 2025·0 cites·10 claims
- 2564US10658361B2Methods of integrating multiple gate dielectric transistors on a tri-gate (FINFET) processTSAI CURTIS·Filed 2011·Granted May 19, 2020·1 cites·8 claims
- 2664US9741721B2Low leakage non-planar access transistor for embedded dynamic random access memory (eDRAM)INTEL CORP·Filed 2013·Granted Aug 22, 2017·1 cites·18 claims
- 2762US10505034B2Vertical transistor using a through silicon via gateINTEL CORP·Filed 2015·Granted Dec 10, 2019·1 cites·9 claims
- 2861US9806095B2High voltage three-dimensional devices having dielectric linersINTEL CORP·Filed 2015·Granted Oct 31, 2017·0 cites·14 claims
- 2961US2023197779A1Integrated circuit structure with backside power deliveryINTEL CORP·Filed 2021·Application pending·0 cites
- 3060US2025374603A1Jog reduction integration for nanoribbons of different widthsLI XIA·Filed 2024·Application pending·0 cites
- 3157US5866462ADouble-spacer technique for forming a bipolar transistor with a very narrow emitterANALOG DEVICES INC·Filed 1995·Granted Feb 2, 1999·19 cites·5 claims
- 3252US10263112B2Vertical non-planar semiconductor device for system-on-chip (SoC) applicationsINTEL CORP·Filed 2016·Granted Apr 16, 2019·0 cites·12 claims
- 3332US8669617B2Multi-gate transistorsJAN CHIA-HONG·Filed 2010·Granted Mar 11, 2014·0 cites·19 claims
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Identity basis: PatentsView inventor disambiguation (2025Q4-odp release). How scoring works →