Inventor · disambiguated record
David Clarke
Also filed as: CLARKE DAVID · CLARKE DAVID PATRICK
16 granted patents·2 pending applications·87 citations·filing 2018–2025
91Inventor score
Files withXILINX INC18
Top patents by PatentIndex Score
18 records- 0196US11336287B1Data processing engine array architecture with memory tilesXILINX INC·Filed 2021·Granted May 17, 2022·26 cites·20 claims
- 0296US10866753B2Data processing engine arrangement in a deviceXILINX INC·Filed 2018·Granted Dec 15, 2020·15 cites·10 claims
- 0395US11669464B1Multi-addressing mode for DMA and non-sequential read and write patternsXILINX INC·Filed 2020·Granted Jun 6, 2023·9 cites·20 claims
- 0495US11520717B1Memory tiles in data processing engine arrayXILINX INC·Filed 2021·Granted Dec 6, 2022·11 cites·20 claims
- 0594US11323391B1Multi-port stream switch for stream interconnect networkXILINX INC·Filed 2020·Granted May 3, 2022·6 cites·20 claims
- 0691US10635622B2System-on-chip interface architectureXILINX INC·Filed 2018·Granted Apr 28, 2020·10 cites·8 claims
- 0789US11848670B2Multiple partitions in a data processing arrayXILINX INC·Filed 2022·Granted Dec 19, 2023·2 cites·10 claims
- 0884US11113223B1Dual mode interconnectXILINX INC·Filed 2018·Granted Sep 7, 2021·4 cites·23 claims
- 0982US2025343549A1Multiple partitions in a data processing arrayXILINX INC·Filed 2025·Application pending·0 cites
- 1078US11567881B1Event-based debug, trace, and profile in device with data processing engine arrayXILINX INC·Filed 2018·Granted Jan 31, 2023·2 cites·20 claims
- 1177US11972132B2Data processing engine arrangement in a deviceXILINX INC·Filed 2022·Granted Apr 30, 2024·0 cites·19 claims
- 1276US11443091B1Data processing engines with cascade connected coresXILINX INC·Filed 2020·Granted Sep 13, 2022·1 cites·20 claims
- 1375US12401364B2Multiple partitions in a data processing arrayXILINX INC·Filed 2023·Granted Aug 26, 2025·0 cites·11 claims
- 1471US11372803B2Data processing engine tile architecture for an integrated circuitXILINX INC·Filed 2018·Granted Jun 28, 2022·1 cites·19 claims
- 1566US11730325B2Dual mode interconnectXILINX INC·Filed 2021·Granted Aug 22, 2023·0 cites·18 claims
- 1655US12067406B2Multiple overlays for use with a data processing arrayXILINX INC·Filed 2022·Granted Aug 20, 2024·0 cites·20 claims
- 1748US12164451B2Data processing array interface having interface tiles with multiple direct memory access circuitsXILINX INC·Filed 2022·Granted Dec 10, 2024·0 cites·20 claims
- 1845US2025370941A1Dma strategies for aie control and configurationXILINX INC·Filed 2024·Application pending·0 cites
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Identity basis: PatentsView inventor disambiguation (2025Q4-odp release). How scoring works →