Inventor · disambiguated record
David M. Daly
Also filed as: DALY DAVID · DALY DAVID M · DALY DAVID MICHAEL
35 granted patents·7 pending applications·106 citations·filing 2006–2016
96Inventor score
Top patents by PatentIndex Score
42 records- 0192US9411730B1Private memory table for reduced memory coherence trafficIBM·Filed 2015·Granted Aug 9, 2016·7 cites·13 claims
- 0291US8930625B2Weighted history allocation predictor algorithm in a hybrid cacheDALY DAVID M·Filed 2012·Granted Jan 6, 2015·14 cites·7 claims
- 0390US9760490B2Private memory table for reduced memory coherence trafficIBM·Filed 2016·Granted Sep 12, 2017·5 cites·11 claims
- 0490US8688915B2Weighted history allocation predictor algorithm in a hybrid cacheDALY DAVID M·Filed 2011·Granted Apr 1, 2014·12 cites·14 claims
- 0589US8185899B2Prediction based priority schedulingDALY DAVID M·Filed 2007·Granted May 22, 2012·16 cites·20 claims
- 0687US9471428B2Using spare capacity in solid state drivesIBM·Filed 2014·Granted Oct 18, 2016·7 cites·12 claims
- 0782US8448178B2Prediction based priority schedulingDALY DAVID M·Filed 2012·Granted May 21, 2013·5 cites·1 claims
- 0880US9311228B2Power reduction in server memory systemDALY DAVID M·Filed 2012·Granted Apr 12, 2016·6 cites·16 claims
- 0980US8683128B2Memory bus write prioritizationDALY DAVID M·Filed 2010·Granted Mar 25, 2014·5 cites·20 claims
- 1079US8788757B2Dynamic inclusive policy in a hybrid cache hierarchy using hit rateDALY DAVID M·Filed 2011·Granted Jul 22, 2014·5 cites·23 claims
- 1178US8615634B2Coordinated writeback of dirty cachelinesDALY DAVID M·Filed 2012·Granted Dec 24, 2013·4 cites·11 claims
- 1277US9928158B2Redundant transactions for detection of timing sensitive errorsIBM·Filed 2016·Granted Mar 27, 2018·2 cites·3 claims
- 1372US10219556B2Actively controlled performance clothingIBM·Filed 2015·Granted Mar 5, 2019·2 cites·5 claims
- 1471US10055295B2Using spare capacity in solid state drivesIBM·Filed 2016·Granted Aug 21, 2018·1 cites·10 claims
- 1571US9766937B2Thread-based cache content saving for task switchingIBM·Filed 2016·Granted Sep 19, 2017·1 cites·14 claims
- 1670US9304863B2Transactions for checkpointing and reverse executionIBM·Filed 2013·Granted Apr 5, 2016·2 cites·19 claims
- 1770US8122216B2Systems and methods for masking latency of memory reorganization work in a compressed memory systemDALY DAVID MICHAEL·Filed 2006·Granted Feb 21, 2012·7 cites·25 claims
- 1866US9495248B2Using spare capacity in solid state drivesIBM·Filed 2014·Granted Nov 15, 2016·1 cites·13 claims
- 1966US9448835B2Thread-based cache content saving for task switchingIBM·Filed 2014·Granted Sep 20, 2016·1 cites·12 claims
- 2066US9436501B2Thread-based cache content saving for task switchingIBM·Filed 2014·Granted Sep 6, 2016·1 cites·7 claims
- 2162US8843707B2Dynamic inclusive policy in a hybrid cache hierarchy using bandwidthDALY DAVID M·Filed 2011·Granted Sep 23, 2014·1 cites·18 claims
- 2259US9792209B2Method and apparatus for cache memory data processingIBM·Filed 2014·Granted Oct 17, 2017·0 cites·10 claims
- 2358US9760489B2Private memory table for reduced memory coherence trafficIBM·Filed 2016·Granted Sep 12, 2017·0 cites·20 claims
- 2457US9710381B2Method and apparatus for cache memory data processingIBM·Filed 2014·Granted Jul 18, 2017·0 cites·10 claims
- 2555US9459979B2Detection of hardware errors using redundant transactions for system testIBM·Filed 2013·Granted Oct 4, 2016·0 cites·20 claims
- 2655US9424192B1Private memory table for reduced memory coherence trafficIBM·Filed 2015·Granted Aug 23, 2016·0 cites·14 claims
- 2755US9251014B2Redundant transactions for detection of timing sensitive errorsIBM·Filed 2013·Granted Feb 2, 2016·0 cites·17 claims
- 2854US9619356B2Detection of hardware errors using periodically synchronized redundant transactions and comparing results from cores of a multi-core processorIBM·Filed 2015·Granted Apr 11, 2017·0 cites·7 claims
- 2954US2013227582A1Prediction Based Priority SchedulingIBM·Filed 2013·Application pending·0 cites
- 3052US9760133B2Locking power suppliesIBM·Filed 2014·Granted Sep 12, 2017·0 cites·16 claims
- 3151US9836398B2Add-on memory coherence directoryIBM·Filed 2015·Granted Dec 5, 2017·0 cites·16 claims
- 3251US9256752B2Product authorization with cross-region accessMICROSOFT TECHNOLOGY LICENSING LLC·Filed 2014·Granted Feb 9, 2016·1 cites·20 claims
- 3351US8645627B2Memory bus write prioritizationDALY DAVID M·Filed 2012·Granted Feb 4, 2014·0 cites·12 claims
- 3450US2014068319A1Error Detection And Correction In A Memory SystemDALY DAVID M·Filed 2012·Application pending·0 cites
- 3550US2014095716A1Maximizing resources in a multi-application processing environementIBM·Filed 2012·Application pending·0 cites
- 3650US2014095718A1Maximizing resources in a multi-application processing environmentIBM·Filed 2012·Application pending·0 cites
- 3749US9842050B2Add-on memory coherence directoryIBM·Filed 2015·Granted Dec 12, 2017·0 cites·19 claims
- 3848US8838901B2Coordinated writeback of dirty cachelinesDALY DAVID M·Filed 2010·Granted Sep 16, 2014·0 cites·19 claims
- 3947US9697128B2Prefetch threshold for cache restorationIBM·Filed 2015·Granted Jul 4, 2017·0 cites·17 claims
- 4042US2014063983A1Error Detection And Correction In A Memory SystemDALY DAVID M·Filed 2012·Application pending·0 cites
- 4141US2013019085A1Efficient Recombining for Dual Path ExecutionIBM·Filed 2011·Application pending·0 cites
- 4241US2013019083A1Redundant Transactional MemoryIBM·Filed 2011·Application pending·0 cites
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Identity basis: PatentsView inventor disambiguation (2025Q4-odp release). How scoring works →