Inventor · disambiguated record
David W. Daniel
Also filed as: DANIEL DAVID · DANIEL DAVID W · HIBARGER GEORGE G
19 granted patents·898 citations·filing 1978–2019
96Inventor score
Top patents by PatentIndex Score
19 records- 0192US6355532B1Subtractive oxidation method of fabricating a short-length and vertically-oriented channel, dual-gate, CMOS FETLSI LOGIC CORP·Filed 1999·Granted Mar 12, 2002·118 cites·37 claims
- 0291US5966599AMethod for fabricating a low trigger voltage silicon controlled rectifier and thick field deviceLSI LOGIC CORP·Filed 1996·Granted Oct 12, 1999·115 cites·28 claims
- 0386US6856029B1Process independent alignment marksLSI LOGIC CORP·Filed 2001·Granted Feb 15, 2005·42 cites·6 claims
- 0486US4150909ABreakwater systemDANIEL DAVID W·Filed 1978·Granted Apr 24, 1979·47 cites·11 claims
- 0585US6870160B1Method and apparatus for monitoring the condition of a lubricating mediumLSI LOGIC CORP·Filed 2002·Granted Mar 22, 2005·27 cites·18 claims
- 0685US6354908B2Method and apparatus for detecting a planarized outer layer of a semiconductor wafer with a confocal optical systemLSI LOGIC CORP·Filed 2001·Granted Mar 12, 2002·30 cites·18 claims
- 0784US6077783AMethod and apparatus for detecting a polishing endpoint based upon heat conducted through a semiconductor waferLSI LOGIC CORP·Filed 1998·Granted Jun 20, 2000·72 cites·10 claims
- 0883US6096625AMethod for improved gate oxide integrity on bulk siliconLSI LOGIC CORP·Filed 1997·Granted Aug 1, 2000·79 cites·28 claims
- 0979US5858828AUse of MEV implantation to form vertically modulated N+ buried layer in an NPN bipolar transistorSYMBIOS INC·Filed 1997·Granted Jan 12, 1999·48 cites·17 claims
- 1078US6316817B1MeV implantation to form vertically modulated N+ buried layer in an NPN bipolar transistorLSI LOGIC CORP·Filed 1998·Granted Nov 13, 2001·46 cites·20 claims
- 1177US6235590B1Fabrication of differential gate oxide thicknesses on a single integrated circuit chipLSI LOGIC CORP·Filed 1998·Granted May 22, 2001·49 cites·14 claims
- 1276US6241847B1Method and apparatus for detecting a polishing endpoint based upon infrared signalsLSI LOGIC CORP·Filed 1998·Granted Jun 5, 2001·47 cites·8 claims
- 1375US6121147AApparatus and method of detecting a polishing endpoint layer of a semiconductor wafer which includes a metallic reporting substanceLSI LOGIC CORP·Filed 1998·Granted Sep 19, 2000·46 cites·20 claims
- 1475US6069048AReduction of silicon defect induced failures as a result of implants in CMOS and other integrated circuitsLSI LOGIC CORP·Filed 1998·Granted May 30, 2000·45 cites·19 claims
- 1573US6201253B1Method and apparatus for detecting a planarized outer layer of a semiconductor wafer with a confocal optical systemLSI LOGIC CORP·Filed 1998·Granted Mar 13, 2001·36 cites·10 claims
- 1672US6506684B1Anti-corrosion systemLSI LOGIC CORP·Filed 2000·Granted Jan 14, 2003·17 cites·20 claims
- 1768US11095675B1System and method for identifying system vulnerabilitiesNATIONWIDE MUTUAL INSURANCE COMPANY·Filed 2019·Granted Aug 17, 2021·1 cites·16 claims
- 1860US6372520B1Sonic assisted strengthening of gate oxidesLSI LOGIC CORP·Filed 1998·Granted Apr 16, 2002·26 cites·20 claims
- 1958US7095483B2Process independent alignment marksLSI LOGIC CORP·Filed 2004·Granted Aug 22, 2006·7 cites·7 claims
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Identity basis: PatentsView inventor disambiguation (2025Q4-odp release). How scoring works →