Inventor · disambiguated record
David O. Erstad
Also filed as: ERSTAD DAVID O · ERSTAD DAVID OWEN
15 granted patents·2 pending applications·242 citations·filing 1999–2012
93Inventor score
Top patents by PatentIndex Score
17 records- 0190US7702949B2Use of non-volatile memory to perform rollback functionMICRON TECHNOLOGY INC·Filed 2007·Granted Apr 20, 2010·19 cites·14 claims
- 0286US7058849B2Use of non-volatile memory to perform rollback functionMICRON TECHNOLOGY INC·Filed 2002·Granted Jun 6, 2006·38 cites·14 claims
- 0385US6794908B2Radiation-hard circuitHONEYWELL INT INC·Filed 2003·Granted Sep 21, 2004·40 cites·15 claims
- 0482US6307237B1L-and U-gate devices for SOI/SOS applicationsHONEYWELL INT INC·Filed 1999·Granted Oct 23, 2001·54 cites·36 claims
- 0579US7679403B2Dual redundant dynamic logicHONEYWELL INT INC·Filed 2005·Granted Mar 16, 2010·10 cites·18 claims
- 0675US6356101B1Glitch removal circuitryHONEYWELL INT INC·Filed 1999·Granted Mar 12, 2002·28 cites·44 claims
- 0771US6833749B2System and method for obtaining hysteresis through body substrate controlHONEYWELL INT INC·Filed 2002·Granted Dec 21, 2004·15 cites·12 claims
- 0866US7619455B2Digital single event transient hardened register using adaptive holdHONEYWELL INT INC·Filed 2007·Granted Nov 17, 2009·5 cites·19 claims
- 0964US6791362B1System level hardening of asynchronous combinational logicHONEYWELL INT INC·Filed 2003·Granted Sep 14, 2004·11 cites·40 claims
- 1062US8399845B2Neutron detector cell efficiencyFECHNER PAUL S·Filed 2012·Granted Mar 19, 2013·2 cites·19 claims
- 1162US6937053B2Single event hardening of null convention logic circuitsHONEYWELL INT INC·Filed 2003·Granted Aug 30, 2005·10 cites·26 claims
- 1259US7579879B2Voting scheme for analog signalsHONEYWELL INT INC·Filed 2005·Granted Aug 25, 2009·4 cites·13 claims
- 1356US7804354B2Circuit architecture for radiation resilienceHONEYWELL INT INC·Filed 2007·Granted Sep 28, 2010·2 cites·19 claims
- 1450US7272747B2Use of non-volatile memory to perform rollback functionMICRON TECHNOLOGY INC·Filed 2006·Granted Sep 18, 2007·0 cites·19 claims
- 1547US7451384B2Error recovery in asynchronous combinational logic circuitsHONEYWELL INT INC·Filed 2004·Granted Nov 11, 2008·4 cites·24 claims
- 1638US2007102760A1Inhibiting radiation hardness of integrated circuitsHONEYWELL INT INC·Filed 2005·Application pending·0 cites
- 1738US2007090431A1Device layout for reducing device upset due to single event effectsHONEYWELL INT INC·Filed 2005·Application pending·0 cites
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Identity basis: PatentsView inventor disambiguation (2025Q4-odp release). How scoring works →