Inventor · disambiguated record
David T. Hass
Also filed as: HASS DAVID · HASS DAVID T
57 granted patents·10 pending applications·1,324 citations·filing 1998–2024
99Inventor score
Top patents by PatentIndex Score
67 records- 0198US6880049B2Sharing a second tier cache memory in a multi-processorJUNIPER NETWORKS INC·Filed 2002·Granted Apr 12, 2005·139 cites·23 claims
- 0296US7765328B2Content service aggregation systemJUNIPER NETWORKS INC·Filed 2007·Granted Jul 27, 2010·106 cites·23 claims
- 0396US7334086B2Advanced processor with system on a chip interconnect technologyRMI CORP·Filed 2004·Granted Feb 19, 2008·95 cites·26 claims
- 0494US8370528B2Content service aggregation systemJUNIPER NETWORKS INC·Filed 2010·Granted Feb 5, 2013·33 cites·9 claims
- 0594US7305492B2Content service aggregation systemJUNIPER NETWORKS INC·Filed 2002·Granted Dec 4, 2007·121 cites·26 claims
- 0693US7509476B2Advanced processor translation lookaside buffer management in a multithreaded systemRMI CORP·Filed 2007·Granted Mar 24, 2009·36 cites·2 claims
- 0792US8754681B2Multi-part clock managementZHU JULIANNE J·Filed 2011·Granted Jun 17, 2014·16 cites·14 claims
- 0892US8725919B1Device configuration for multiprocessor systemsZHU JULIANNE J·Filed 2011·Granted May 13, 2014·22 cites·35 claims
- 0992US8499302B2Advanced processor with mechanism for packet distribution at high line rateHASS DAVID T·Filed 2011·Granted Jul 30, 2013·17 cites·20 claims
- 1092US7627717B2Advanced processor messaging apparatus including fast messaging ring components configured to accomodate point-to-point transfer of non-memory related messagesRMI CORP·Filed 2007·Granted Dec 1, 2009·21 cites·37 claims
- 1191US8037224B2Delegating network processor operations to star topology serial bus interfacesNETLOGIC MICROSYSTEMS INC·Filed 2007·Granted Oct 11, 2011·19 cites·22 claims
- 1291US7995596B2System and method for offloading packet protocol encapsulation from softwareNETLOGIC MICROSYSTEMS INC·Filed 2008·Granted Aug 9, 2011·23 cites·23 claims
- 1391US6895477B2Ring-based memory requests in a shared memory multi-processorJUNIPER NETWORKS INC·Filed 2002·Granted May 17, 2005·43 cites·25 claims
- 1490US8438337B1System and method for conditionally sending a request for data to a home nodeGARG GAURAV·Filed 2009·Granted May 7, 2013·20 cites·21 claims
- 1590US7538695B2System and method for deflate processing within a compression engineRMI CORP·Filed 2007·Granted May 26, 2009·24 cites·42 claims
- 1690US7346757B2Advanced processor translation lookaside buffer management in a multithreaded systemRMI CORP·Filed 2004·Granted Mar 18, 2008·51 cites·10 claims
- 1790US6901482B2Managing ownership of a full cache line using a store-create operationJUNIPER NETWORKS INC·Filed 2002·Granted May 31, 2005·40 cites·24 claims
- 1887US7627721B2Advanced processor with cache coherencyRMI CORP·Filed 2004·Granted Dec 1, 2009·38 cites·18 claims
- 1987US6839808B2Processing cluster having multiple compute engines and shared tier one cachesJUNIPER NETWORKS INC·Filed 2001·Granted Jan 4, 2005·35 cites·41 claims
- 2086US8478811B2Advanced processor with credit based scheme for optimal packet flow in a multi-processor system on a chipGARG GAURAV·Filed 2008·Granted Jul 2, 2013·14 cites·38 claims
- 2186US7538696B2System and method for Huffman decoding within a compression engineRMI CORP·Filed 2007·Granted May 26, 2009·17 cites·27 claims
- 2286US7509462B2Advanced processor with use of bridges on a data movement ring for optimal redirection of memory and I/O trafficRMI CORP·Filed 2004·Granted Mar 24, 2009·35 cites·57 claims
- 2385US8671220B1Network-on-chip system, method, and computer program product for transmitting messages utilizing a centralized on-chip shared memory switchGARG GAURAV·Filed 2008·Granted Mar 11, 2014·13 cites·22 claims
- 2485US7941603B2Method and apparatus for implementing cache coherency of a processorNETLOGIC MICROSYSTEMS INC·Filed 2009·Granted May 10, 2011·10 cites·21 claims
- 2585US6892282B2Ring based multi-processing systemJUNIPER NETWORKS INC·Filed 2002·Granted May 10, 2005·22 cites·33 claims
- 2683US8788732B2Messaging network for processing data using multiple processor coresNETLOGIC MICROSYSTEMS INC·Filed 2013·Granted Jul 22, 2014·4 cites·20 claims
- 2783US7467243B2Advanced processor with scheme for optimal packet flow in a multi-processor system on a chipRMI CORP·Filed 2004·Granted Dec 16, 2008·36 cites·38 claims
- 2882US9069564B1Weighted instruction count schedulingRASHID ABBAS·Filed 2012·Granted Jun 30, 2015·8 cites·20 claims
- 2982US8549341B2System and method for reducing latency associated with timestamps in a multi-core, multi-threaded processorSHAHID AHMED·Filed 2008·Granted Oct 1, 2013·13 cites·20 claims
- 3082US8015567B2Advanced processor with mechanism for packet distribution at high line rateNETLOGIC MICROSYSTEMS INC·Filed 2004·Granted Sep 6, 2011·27 cites·34 claims
- 3182US7461215B2Advanced processor with implementation of memory ordering on a ring based data movement networkRMI CORP·Filed 2004·Granted Dec 2, 2008·35 cites·39 claims
- 3281US8065456B2Delegating network processor operations to star topology serial bus interfacesZHU JULIANNE JIANG·Filed 2008·Granted Nov 22, 2011·8 cites·21 claims
- 3379US9083628B2Content service aggregation systemJUNIPER NETWORKS INC·Filed 2013·Granted Jul 14, 2015·4 cites·19 claims
- 3479US7991977B2Advanced processor translation lookaside buffer management in a multithreaded systemNETLOGIC MICROSYSTEMS INC·Filed 2007·Granted Aug 2, 2011·7 cites·23 claims
- 3578US9128771B1System, method, and computer program product to distribute workloadGARG GAURAV·Filed 2009·Granted Sep 8, 2015·8 cites·39 claims
- 3678US8566533B1System, method, and computer program product for conditionally sending a request for data to a node based on a determinationGARG GAURAV·Filed 2009·Granted Oct 22, 2013·7 cites·21 claims
- 3778US7461213B2Advanced processor system using request, data, snoop, and response ringsRMI CORP·Filed 2004·Granted Dec 2, 2008·36 cites·26 claims
- 3877US9244798B1Programmable micro-core processors for packet parsing with packet orderingKUILA KAUSHIK·Filed 2011·Granted Jan 26, 2016·5 cites·12 claims
- 3976US9264380B2Method and apparatus for implementing cache coherency of a processorHASS DAVID T·Filed 2011·Granted Feb 16, 2016·3 cites·20 claims
- 4076US8543747B2Delegating network processor operations to star topology serial bus interfacesZHU JULIANNE JIANG·Filed 2011·Granted Sep 24, 2013·3 cites·21 claims
- 4173US8949522B1Performance of a stride-based prefetcher on an out-of-order processing unit (CPU)GARG GAURAV·Filed 2011·Granted Feb 3, 2015·3 cites·26 claims
- 4272US7984268B2Advanced processor scheduling in a multithreaded systemNETLOGIC MICROSYSTEMS INC·Filed 2004·Granted Jul 19, 2011·14 cites·12 claims
- 4372US7924828B2Advanced processor with mechanism for fast packet queuing operationsNETLOGIC MICROSYSTEMS INC·Filed 2004·Granted Apr 12, 2011·13 cites·33 claims
- 4471US9596324B2System and method for parsing and allocating a plurality of packets to processor core threadsHASS DAVID T·Filed 2008·Granted Mar 14, 2017·5 cites·30 claims
- 4571US8713255B2System and method for conditionally sending a request for data to a home nodeNETLOGIC MICROSYSTEMS INC·Filed 2013·Granted Apr 29, 2014·2 cites·20 claims
- 4670US9455598B1Programmable micro-core processors for packet parsingKUILA KAUSHIK·Filed 2011·Granted Sep 27, 2016·4 cites·27 claims
- 4770US8176298B2Multi-core multi-threaded processing systems with instruction reordering in an in-order pipelineHASS DAVID T·Filed 2004·Granted May 8, 2012·13 cites·19 claims
- 4869US7961723B2Advanced processor with mechanism for enforcing ordering between information sent on two independent networksNETLOGIC MICROSYSTEMS INC·Filed 2004·Granted Jun 14, 2011·11 cites·43 claims
- 4967US8724657B2System and method for offloading packet protocol encapsulation from softwareKUILA KAUSHIK·Filed 2011·Granted May 13, 2014·2 cites·16 claims
- 5065US9092360B2Advanced processor translation lookaside buffer management in a multithreaded systemHASS DAVID T·Filed 2011·Granted Jul 28, 2015·1 cites·18 claims
Showing the top 50 of 67 patent records by PatentIndex Score.
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Identity basis: PatentsView inventor disambiguation (2025Q4-odp release). How scoring works →