Inventor · disambiguated record
David S. Hutton
Also filed as: HUTTON DAVID · HUTTON DAVID S · HUTTON DAVID SHANE
36 granted patents·3 pending applications·139 citations·filing 1987–2024
96Inventor score
Top patents by PatentIndex Score
39 records- 0190US8195924B2Early instruction text based operand store compare reject avoidanceALEXANDER KHARY J·Filed 2011·Granted Jun 5, 2012·18 cites·12 claims
- 0289US8938605B2Instruction cracking based on machine stateBUSABA FADI·Filed 2010·Granted Jan 20, 2015·15 cites·19 claims
- 0388US9524165B1Register comparison for operand store compare (OSC) predictionIBM·Filed 2016·Granted Dec 20, 2016·5 cites·1 claims
- 0487US7577795B2Disowning cache entries on aging out of the entryIBM·Filed 2006·Granted Aug 18, 2009·17 cites·3 claims
- 0585US10013257B2Register comparison for operand store compare (OSC) predictionIBM·Filed 2017·Granted Jul 3, 2018·3 cites·1 claims
- 0678US7475193B2Separate data and coherency cache directories in a shared cache in a multiprocessor systemIBM·Filed 2006·Granted Jan 6, 2009·9 cites·19 claims
- 0777US7975130B2Method and system for early instruction text based operand store compare reject avoidanceIBM·Filed 2008·Granted Jul 5, 2011·8 cites·14 claims
- 0876US7853635B2Modular binary multiplier for signed and unsigned operands of variable widthsIBM·Filed 2007·Granted Dec 14, 2010·6 cites·14 claims
- 0972US9760379B2Register comparison for operand store compare (OSC) predictionIBM·Filed 2016·Granted Sep 12, 2017·1 cites·1 claims
- 1071US8453124B2Collecting computer processor instrumentation dataALEXANDER GREGORY W·Filed 2009·Granted May 28, 2013·5 cites·20 claims
- 1170US8464030B2Instruction cracking and issue shortening based on instruction base fields, index fields, operand fields, and various other instruction text bitsBUSABA FADI·Filed 2010·Granted Jun 11, 2013·3 cites·19 claims
- 1269US9389865B1Accelerated execution of target of execute instructionIBM·Filed 2015·Granted Jul 12, 2016·1 cites·1 claims
- 1368US7266580B2Modular binary multiplier for signed and unsigned operands of variable widthsIBM·Filed 2003·Granted Sep 4, 2007·10 cites·21 claims
- 1466US9626189B2Reducing operand store compare penaltiesBUSABA FADI·Filed 2012·Granted Apr 18, 2017·2 cites·19 claims
- 1566US8874885B2Mitigating lookahead branch prediction latency by purposely stalling a branch instruction until a delayed branch prediction is received or a timeout occursBONANNO JAMES J·Filed 2008·Granted Oct 28, 2014·3 cites·18 claims
- 1666US8131945B2Disowning cache entries on aging out of the entryHUTTON DAVID S·Filed 2009·Granted Mar 6, 2012·3 cites·30 claims
- 1762US10884754B2Infinite processor thread balancingIBM·Filed 2019·Granted Jan 5, 2021·0 cites·20 claims
- 1862US7861064B2Method, system, and computer program product for selectively accelerating early instruction processingIBM·Filed 2008·Granted Dec 28, 2010·2 cites·12 claims
- 1961US7949972B2Method, system and computer program product for exploiting orthogonal control vectors in timing driven synthesisIBM·Filed 2008·Granted May 24, 2011·2 cites·20 claims
- 2060US10540183B2Accelerated execution of execute instruction targetIBM·Filed 2017·Granted Jan 21, 2020·0 cites·16 claims
- 2159US7971034B2Reduced overhead address mode change management in a pipelined, recycling microprocessorIBM·Filed 2008·Granted Jun 28, 2011·1 cites·1 claims
- 2258US8566529B2Method, system and computer program product for generalized LRU in cache and memory performance analysis and modelingHUTTON DAVID S·Filed 2008·Granted Oct 22, 2013·2 cites·16 claims
- 2355US10558464B2Infinite processor thread balancingIBM·Filed 2017·Granted Feb 11, 2020·0 cites·17 claims
- 2455US9710281B2Register comparison for operand store compare (OSC) predictionIBM·Filed 2015·Granted Jul 18, 2017·0 cites·17 claims
- 2554US9875107B2Accelerated execution of execute instruction targetIBM·Filed 2015·Granted Jan 23, 2018·0 cites·16 claims
- 2654US9710278B2Optimizing grouping of instructionsIBM·Filed 2014·Granted Jul 18, 2017·0 cites·12 claims
- 2754US8443176B2Method, system, and computer program product for reducing cache memory pollutionSONNELITTER III ROBERT J·Filed 2008·Granted May 14, 2013·1 cites·24 claims
- 2852US10365928B2Suppress unnecessary mapping for scratch registerIBM·Filed 2017·Granted Jul 30, 2019·0 cites·17 claims
- 2952US7490121B2Modular binary multiplier for signed and unsigned operands of variable widthsIBM·Filed 2007·Granted Feb 10, 2009·0 cites·14 claims
- 3052US2025342067A1Allocating logical partitions in a computing environment with multiple processor core typesIBM·Filed 2024·Application pending·0 cites
- 3150US7913067B2Method and system for overlapping execution of instructions through non-uniform execution pipelines in an in-order processorIBM·Filed 2008·Granted Mar 22, 2011·0 cites·22 claims
- 3249US9766896B2Optimizing grouping of instructionsIBM·Filed 2015·Granted Sep 19, 2017·0 cites·7 claims
- 3348US7895538B2System and method for providing a common instruction tableIBM·Filed 2008·Granted Feb 22, 2011·0 cites·18 claims
- 3447US7921279B2Operand and result forwarding between differently sized operands in a superscalar processorIBM·Filed 2008·Granted Apr 5, 2011·0 cites·16 claims
- 3547US2009217017A1Method, system and computer program product for minimizing branch prediction latencyIBM·Filed 2008·Application pending·0 cites
- 3646US10599431B2Managing backend resources via frontend steering or stallsIBM·Filed 2017·Granted Mar 24, 2020·0 cites·18 claims
- 3746US8423968B2Template-based vertical microcode instruction trace generationHUTTON DAVID S·Filed 2008·Granted Apr 16, 2013·0 cites·17 claims
- 3843US2007180193A1History based line installIBM·Filed 2006·Application pending·0 cites
- 3942US4846286ABall mark fixer apparatus with pivotal turf gripping elementMCNEELY JOHN J·Filed 1987·Granted Jul 11, 1989·22 cites·7 claims
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Identity basis: PatentsView inventor disambiguation (2025Q4-odp release). How scoring works →