Inventor · disambiguated record
Daniel E. Lenoski
Also filed as: LENOSKI DANIEL · LENOSKI DANIEL E · LENOSKI DANIEL EDWARD
33 granted patents·1,480 citations·filing 1987–2011
98Inventor score
Files withSILICON GRAPHICS INC15TANDEM COMPUTERS INC10CISCO TECH IND4CISCO TECH INC1NISHTALA SATYANARAYANA1
Top patents by PatentIndex Score
33 records- 0194US6735173B1Method and apparatus for accumulating and distributing data items within a packet switching systemCISCO TECH IND·Filed 2000·Granted May 11, 2004·115 cites·29 claims
- 0293US6990063B1Distributing fault indications and maintaining and using a data structure indicating faults to route traffic in a packet switching systemUNIV WASHINGTON·Filed 2000·Granted Jan 24, 2006·109 cites·10 claims
- 0393US6816492B1Resequencing packets at output ports without errors using packet timestamps and timestamp floorsCISCO TECH IND·Filed 2000·Granted Nov 9, 2004·99 cites·26 claims
- 0493US6049476AHigh memory capacity DIMM with data and state memorySILICON GRAPHICS INC·Filed 1998·Granted Apr 11, 2000·215 cites·8 claims
- 0590US8117369B2Input-output module for operation in memory module socket and method for extending a memory interface for input-output operationsNISHTALA SATYANARAYANA·Filed 2011·Granted Feb 14, 2012·15 cites·18 claims
- 0685US6826186B1Method and apparatus for distributing packets across multiple paths leading to a destinationCISCO TECH IND·Filed 2000·Granted Nov 30, 2004·47 cites·27 claims
- 0783US7886103B2Input-output module, processing platform and method for extending a memory interface for input-output operationsCISCO TECH INC·Filed 2008·Granted Feb 8, 2011·10 cites·20 claims
- 0883US6747972B1Method and apparatus for reducing the required size of sequence numbers used in resequencing packetsCISCO TECH IND·Filed 2000·Granted Jun 8, 2004·41 cites·62 claims
- 0982US5790447AHigh-memory capacity DIMM with data and state memorySILICON GRAPHICS INC·Filed 1996·Granted Aug 4, 1998·93 cites·76 claims
- 1082US5727150AApparatus and method for page migration in a non-uniform memory access (NUMA) systemSILICON GRAPHICS INC·Filed 1996·Granted Mar 10, 1998·107 cites·28 claims
- 1180US5686730ADimm pair with data memory and state memorySILICON GRAPHICS INC·Filed 1996·Granted Nov 11, 1997·50 cites·34 claims
- 1274US6182195B1System and method for maintaining coherency of virtual-to-physical memory translations in a multiprocessor computerSILICON GRAPHICS INC·Filed 1998·Granted Jan 30, 2001·59 cites·22 claims
- 1373US7500068B1Method and system for managing memory in a multiprocessor systemSILICON GRAPHICS INC·Filed 2006·Granted Mar 3, 2009·5 cites·20 claims
- 1469US4780874ADiagnostic apparatus for a data processing systemTANDEM COMPUTERS INC·Filed 1987·Granted Oct 25, 1988·23 cites·26 claims
- 1568US7069306B1Providing shared and non-shared access to memory in a system with plural processor coherence domainsSILICON GRAPHICS INC·Filed 2001·Granted Jun 27, 2006·11 cites·29 claims
- 1668US5005118AMethod and apparatus for modifying micro-instructions using a macro-instruction pipelineTANDEM COMPUTERS INC·Filed 1987·Granted Apr 2, 1991·38 cites·1 claims
- 1767US5309561ASynchronous processor unit with interconnected, separately clocked processor sections which are automatically synchronized for data transfer operationsTANDEM COMPUTERS INC·Filed 1990·Granted May 3, 1994·56 cites·10 claims
- 1864US5634110ACache coherency using flexible directory bit vectorsSILICON GRAPHICS INC·Filed 1995·Granted May 27, 1997·44 cites·17 claims
- 1963US5822381ADistributed global clock systemSILICON GRAPHICS INC·Filed 1995·Granted Oct 13, 1998·45 cites·17 claims
- 2062US5787476ASystem and method for maintaining coherency of virtual-to-physical memory translations in a multiprocessor computerSILICON GRAPHICS INC·Filed 1995·Granted Jul 28, 1998·36 cites·9 claims
- 2162US5768529ASystem and method for the synchronous transmission of data in a communication network utilizing a source clock signal to latch serial data into first registers and a handshake signal to latch parallel data into second registersSILICON GRAPHICS INC·Filed 1995·Granted Jun 16, 1998·46 cites·26 claims
- 2262US5669008AHierarchical fat hypercube architecture for parallel processing systemsSILICON GRAPHICS INC·Filed 1995·Granted Sep 16, 1997·40 cites·16 claims
- 2358US4899307AStack with unary encoded stack pointerTANDEM COMPUTERS INC·Filed 1987·Granted Feb 6, 1990·23 cites·7 claims
- 2456US6981101B1Method and system for maintaining data at input/output (I/O) interfaces for a multiprocessor systemSILICON GRAPHICS INC·Filed 2001·Granted Dec 27, 2005·6 cites·25 claims
- 2555US4843608ACross-coupled checking circuitTANDEM COMPUTERS INC·Filed 1987·Granted Jun 27, 1989·22 cites·15 claims
- 2652US5185870ASystem to determine if modification of first macroinstruction to execute in fewer clock cyclesTANDEM COMPUTERS INC·Filed 1992·Granted Feb 9, 1993·22 cites·13 claims
- 2750US5132927ASystem for cache space allocation using selective addressingTANDEM COMPUTERS INC·Filed 1990·Granted Jul 21, 1992·24 cites·4 claims
- 2847US5991895ASystem and method for multiprocessor partitioning to support high availabilitySILICON GRAPHICS INC·Filed 1995·Granted Nov 23, 1999·20 cites·20 claims
- 2947US5974456ASystem and method for input/output flow control in a multiprocessor computer systemSILICON GRAPHICS INC·Filed 1997·Granted Oct 26, 1999·20 cites·10 claims
- 3047US5032983AEntry point mapping and skipping method and apparatusTANDEM COMPUTERS INC·Filed 1989·Granted Jul 16, 1991·15 cites·13 claims
- 3138US4819165ASystem for performing group relative addressingTANDEM COMPUTERS INC·Filed 1987·Granted Apr 4, 1989·8 cites·5 claims
- 3236US6141741AComputer system with a shared address bus and pipelined write operationsSUN MICROSYSTEMS INC·Filed 1996·Granted Oct 31, 2000·10 cites·5 claims
- 3335US4825356AMicrocoded microprocessor with shared ramTANDEM COMPUTERS INC·Filed 1987·Granted Apr 25, 1989·6 cites·2 claims
Join the waitlist — get patent alerts
Get an alert when Daniel E. Lenoski files or is granted a new patent.
We store only your email — no account needed. See our privacy policy.
Identity basis: PatentsView inventor disambiguation (2025Q4-odp release). How scoring works →