Inventor · disambiguated record
David Lepejian
Also filed as: LEPEJIAN DAVID · LEPEJIAN DAVID Y · LEPEJIAN DAVID YEPEJIAN
4 granted patents·146 citations·filing 1997–2000
81Inventor score
Top patents by PatentIndex Score
4 records- 0180US6745370B1Method for selecting an optimal level of redundancy in the design of memoriesHEURISTICS PHYSICS LAB INC·Filed 2000·Granted Jun 1, 2004·29 cites·8 claims
- 0279US6154714AMethod for using wafer navigation to reduce testing times of integrated circuit wafersHEURISTIC PHYSICS LAB·Filed 1997·Granted Nov 28, 2000·56 cites·15 claims
- 0374US6330696B1Self-testing of DRAMs for multiple faultsAGERE SYST GUARDIAN CORP·Filed 1998·Granted Dec 11, 2001·37 cites·5 claims
- 0457US6096093AMethod for using inspection data for improving throughput of stepper operations in manufacturing of integrated circuitsHEURISTIC PHYSICS LAB·Filed 1997·Granted Aug 1, 2000·24 cites·13 claims
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Identity basis: PatentsView inventor disambiguation (2025Q4-odp release). How scoring works →