Inventor · disambiguated record
Darshan Kumar Nandanwar
Also filed as: NANDANWAR DARSHAN KUMAR
13 granted patents·5 pending applications·0 citations·filing 2022–2024
80Inventor score
Files withQUALCOMM INC18
Top patents by PatentIndex Score
18 records- 0162US12451179B2Refresh window aware truncation of restore voltages for random access memoryQUALCOMM INC·Filed 2024·Granted Oct 21, 2025·0 cites·20 claims
- 0261US12282447B2Execution unit sharing between processing cores in a cluster of a system-on-chip (SoC)QUALCOMM INC·Filed 2023·Granted Apr 22, 2025·0 cites·20 claims
- 0358US12450063B2Maintaining approximate uniformity of aging of equivalent processing circuits in a pipeline stage(s) in a processorQUALCOMM INC·Filed 2023·Granted Oct 21, 2025·0 cites·20 claims
- 0458US12443713B2Systems and methods for defending against side channel attacks to speculative execution of processor pipeline instructionsQUALCOMM INC·Filed 2024·Granted Oct 14, 2025·0 cites·20 claims
- 0555US11940914B2Performance aware partial cache collapseQUALCOMM INC·Filed 2022·Granted Mar 26, 2024·0 cites·30 claims
- 0654US11836086B1Access optimized partial cache collapseQUALCOMM INC·Filed 2022·Granted Dec 5, 2023·0 cites·23 claims
- 0754US2025279330A1Enhanced integrated circuit heat dissipation using inactive metal linesQUALCOMM INC·Filed 2024·Application pending·0 cites
- 0853US12299301B2Methods and systems for altering the path of data movement for large-sized memory transactionsQUALCOMM INC·Filed 2023·Granted May 13, 2025·0 cites·20 claims
- 0953US12153924B2System and method for performing energy-efficient processing through reduced data movementQUALCOMM INC·Filed 2023·Granted Nov 26, 2024·0 cites·27 claims
- 1052US2025190113A1Charge-sensitive dram access timing controlQUALCOMM INC·Filed 2023·Application pending·0 cites
- 1150US12438532B2Power saving circuits to adjust frequency according to dynamic timing margin changes and adjust supply voltage to restore desired frequency and related methodsQUALCOMM INC·Filed 2024·Granted Oct 7, 2025·0 cites·27 claims
- 1250US12405792B2Processing unit including a dynamically allocatable vector register file for non-vector instruction processingQUALCOMM INC·Filed 2023·Granted Sep 2, 2025·0 cites·19 claims
- 1349US12488857B2Static random access memory (SRAM) fault correctionQUALCOMM INC·Filed 2023·Granted Dec 2, 2025·0 cites·28 claims
- 1449US12380026B2Optimizing cache energy consumption in processor-based devicesQUALCOMM INC·Filed 2023·Granted Aug 5, 2025·0 cites·29 claims
- 1549US12314099B2Predictive runtime thermal management systems and methodsQUALCOMM INC·Filed 2023·Granted May 27, 2025·0 cites·24 claims
- 1649US2025265084A1Dynamically reconfiguring an out-of-order processing circuit in a processing unit to process instructions in order based on power consumption of a workloadQUALCOMM INC·Filed 2024·Application pending·0 cites
- 1748US2025291939A1Providing authenticated-exclusive access to shared resources in processor-based devicesQUALCOMM INC·Filed 2024·Application pending·0 cites
- 1848US2025191112A1Warp access pattern-aware cachesQUALCOMM INC·Filed 2023·Application pending·0 cites
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Identity basis: PatentsView inventor disambiguation (2025Q4-odp release). How scoring works →