Inventor · disambiguated record
Daniel L. Stanley
Also filed as: STANLEY DANIEL L
14 granted patents·6 pending applications·679 citations·filing 1993–2023
93Inventor score
Top patents by PatentIndex Score
20 records- 0194US11861181B1Triple modular redundancy (TMR) radiation hardened memory systemBAE SYS INF & ELECT SYS INTEG·Filed 2022·Granted Jan 2, 2024·6 cites·20 claims
- 0293US5568380AShadow register file for instruction rollbackIBM·Filed 1993·Granted Oct 22, 1996·126 cites·7 claims
- 0392US5708779AMultimedia system and method of controlling data transfer between a host system and a network adapter using a DMA engineIBM·Filed 1996·Granted Jan 13, 1998·227 cites·23 claims
- 0488US11104457B1Power distribution deviceBAE SYS INF & ELECT SYS INTEG·Filed 2020·Granted Aug 31, 2021·5 cites·20 claims
- 0588US5758075AMultimedia communication apparatus and methodsIBM·Filed 1996·Granted May 26, 1998·172 cites·48 claims
- 0685US5687316ACommunication apparatus and methods having P-MAC, I-MAC engines and buffer bypass for simultaneously transmitting multimedia and packet dataIBM·Filed 1994·Granted Nov 11, 1997·104 cites·28 claims
- 0778US10700046B2Multi-chip hybrid system-in-package for providing interoperability and other enhanced features to high complexity integrated circuitsBAE SYS INF & ELECT SYS INTEG·Filed 2018·Granted Jun 30, 2020·3 cites·21 claims
- 0873US11108383B1Clock phase controlBAE SYS INF & ELECT SYS INTEG·Filed 2020·Granted Aug 31, 2021·1 cites·19 claims
- 0960US5532937ASwitching of multiple multimedia data streamsIBM·Filed 1994·Granted Jul 2, 1996·25 cites·6 claims
- 1058US6668300B1Computer device having multiple linked parallel busses and associated methodBAE SYSTEMS INFORMATION·Filed 2000·Granted Dec 23, 2003·6 cites·53 claims
- 1154US2025199955A1Random-access memory scrubbingBAE SYS INF & ELECT SYS INTEG·Filed 2023·Application pending·0 cites
- 1252US12277255B2Secure semiconductor and system designBAE SYS INF & ELECT SYS INTEG·Filed 2022·Granted Apr 15, 2025·0 cites·17 claims
- 1350US2025077755A1Semiconductor device with redacted logicBAE SYS INF & ELECT SYS INTEG·Filed 2023·Application pending·0 cites
- 1445US12253964B2DSP eco system scalable with obfuscationBAE SYS INF & ELECT SYS INTEG·Filed 2022·Granted Mar 18, 2025·0 cites·18 claims
- 1544US11971845B2DSP encapsulationBAE SYS INF & ELECT SYS INTEG·Filed 2022·Granted Apr 30, 2024·0 cites·16 claims
- 1644US2023366931A1Secure joint test action group (jtag)BAE SYS INF & ELECT SYS INTEG·Filed 2022·Application pending·0 cites
- 1744US2023367738A1Asic power controlBAE SYS INF & ELECT SYS INTEG·Filed 2022·Application pending·0 cites
- 1841US2023244824A1Firewall for on-chip signalingBAE SYS INF & ELECT SYS INTEG·Filed 2022·Application pending·0 cites
- 1939US2022141237A1Detection of abnormal or malicious activity in point-to-point or packet-switched networksBAE SYS INF & ELECT SYS INTEG·Filed 2020·Application pending·0 cites
- 2029US5649097ASynchronizing a prediction RAMIBM·Filed 1996·Granted Jul 15, 1997·4 cites·8 claims
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Identity basis: PatentsView inventor disambiguation (2025Q4-odp release). How scoring works →