Inventor · disambiguated record
Dale Wong
Also filed as: WONG DALE · WONG DALE M
18 granted patents·4 pending applications·1,790 citations·filing 1990–2004
96Inventor score
Top patents by PatentIndex Score
22 records- 0197US6282627B1Integrated processor and programmable data path chip for reconfigurable computingCHAMELEON SYSTEMS INC·Filed 1998·Granted Aug 28, 2001·364 cites·29 claims
- 0297US5970254AIntegrated processor and programmable data path chip for reconfigurable computingFiled 1997·Granted Oct 19, 1999·348 cites·11 claims
- 0396US6940308B2Interconnection network for a field programmable gate arrayLEOPARD LOGIC INC·Filed 2004·Granted Sep 6, 2005·76 cites·5 claims
- 0496US5966534AMethod for compiling high level programming languages into an integrated processor with reconfigurable logicFiled 1997·Granted Oct 12, 1999·275 cites·51 claims
- 0595US6693456B2Interconnection network for a field programmable gate arrayLEOPARD LOGIC INC·Filed 2001·Granted Feb 17, 2004·69 cites·29 claims
- 0688US6708325B2Method for compiling high level programming languages into embedded microprocessor with multiple reconfigurable logicINTEL CORP·Filed 1998·Granted Mar 16, 2004·121 cites·52 claims
- 0787US6298472B1Behavioral silicon construct architecture and mappingCHAMELEON SYSTEMS INC·Filed 1999·Granted Oct 2, 2001·171 cites·36 claims
- 0886US6389579B1Reconfigurable logic for table lookupCHAMELEON SYSTEMS·Filed 1999·Granted May 14, 2002·138 cites·26 claims
- 0974US5202840AMethod for partitioning of connected circuit components before placement in one or more integrated circuitsVLSI TECHNOLOGY INC·Filed 1990·Granted Apr 13, 1993·64 cites·18 claims
- 1069US6801052B2Field programmable gate array core cell with efficient logic packingLEOPARD LOGIC INC·Filed 2002·Granted Oct 5, 2004·14 cites·14 claims
- 1163US5349536AMethod for optimally placing components of a VLSI circuitVLSI TECHNOLOGY INC·Filed 1991·Granted Sep 20, 1994·40 cites·20 claims
- 1263US5208759AMethod for placement of circuit components in an integrated circuitVLSI TECHNOLOGY INC·Filed 1990·Granted May 4, 1993·40 cites·17 claims
- 1360US6888371B2Programmable interface for field programmable gate array coresLEOPARD LOGIC INC·Filed 2002·Granted May 3, 2005·7 cites·24 claims
- 1456US5359538AMethod for regular placement of data path components in VLSI circuitsVLSI TECHNOLOGY INC·Filed 1991·Granted Oct 25, 1994·30 cites·10 claims
- 1554US7009421B2Field programmable gate array core cell with efficient logic packingAGATE LOGIC INC·Filed 2004·Granted Mar 7, 2006·4 cites·13 claims
- 1654US5309370AMethod for placement of connectors used interconnecting circuit components in an integrated circuitVLSI TECHNOLOGY INC·Filed 1990·Granted May 3, 1994·25 cites·8 claims
- 1750US7502920B2Hierarchical storage architecture for reconfigurable logic configurationsINTEL CORP·Filed 2003·Granted Mar 10, 2009·1 cites·11 claims
- 1842US2002150252A1Secure intellectual property for a generated field programmable gate arrayLEOPARD LOGIC INC·Filed 2002·Application pending·0 cites
- 1935US2003212940A1Interface architecture for embedded field programmable gate array coresFiled 2002·Application pending·0 cites
- 2034US2004105207A1Via programmable gate array interconnect architectureLEOPARD LOGIC INC·Filed 2003·Application pending·0 cites
- 2132US5187864AAdaptable topologies used in routing of ground and power networks on integrated circuitsVLSI TECHNOLOGY INC·Filed 1991·Granted Feb 23, 1993·3 cites·6 claims
- 2226US2003039262A1Hierarchical mux based integrated circuit interconnect architecture for scalability and automatic generationLEOPARD LOGIC INC·Filed 2002·Application pending·0 cites
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Identity basis: PatentsView inventor disambiguation (2025Q4-odp release). How scoring works →