Inventor · disambiguated record
Deepak Gajanana
Also filed as: GAJANANA DEEPAK
3 granted patents·4 pending applications·4 citations·filing 2007–2025
55Inventor score
Top patents by PatentIndex Score
7 records- 0154US8064177B2ESD protection for DC/DC converterGAJANANA DEEPAK·Filed 2007·Granted Nov 22, 2011·2 cites·10 claims
- 0252US2025385190A1Package comprising a first and a second semiconductor die, wherein a galvanic coupling is provided between those semiconductor dies, as well as a corresponding methodNexperia BV·Filed 2025·Application pending·0 cites
- 0352US2025385194A1Leadless package comprising a first and a second semiconductor die, wherein a galvanic isolation is provided between those semiconductor dies, as well as a corresponding methodNexperia BV·Filed 2025·Application pending·0 cites
- 0452US2025385188A1Leadless package comprising a first and a second semiconductor die, wherein a galvanic coupling is provided between those semiconductor dies, as well as a corresponding methodNexperia BV·Filed 2025·Application pending·0 cites
- 0552US2025385193A1A leadless package comprising a first and a second semiconductor die, wherein a galvanic coupling is provided between those semiconductor dies, as well as a corresponding methodNexperia BV·Filed 2025·Application pending·0 cites
- 0639US8508892B2Integrated circuit with DC-DC converter and ESD protectionGAJANANA DEEPAK·Filed 2008·Granted Aug 13, 2013·2 cites·7 claims
- 0736US12401357B2Area efficient bidirectional switch with off state injection current controlNexperia BV·Filed 2023·Granted Aug 26, 2025·0 cites·19 claims
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Identity basis: PatentsView inventor disambiguation (2025Q4-odp release). How scoring works →