Inventor · disambiguated record
Dharmendar Reddy Palle
Also filed as: PALLE DHARMENDAR · PALLE DHARMENDAR REDDY
22 granted patents·1 pending application·163 citations·filing 2009–2024
93Inventor score
Top patents by PatentIndex Score
23 records- 0198US9647098B2Thermionically-overdriven tunnel FETs and methods of fabricating the sameSAMSUNG ELECTRONICS CO LTD·Filed 2015·Granted May 9, 2017·42 cites·24 claims
- 0297US9287357B2Integrated circuits with Si and non-Si nanosheet FET co-integration with low band-to-band tunneling and methods of fabricating the sameSAMSUNG ELECTRONICS CO LTD·Filed 2015·Granted Mar 15, 2016·66 cites·20 claims
- 0395US9905672B2Method of forming internal dielectric spacers for horizontal nanosheet FET architecturesSAMSUNG ELECTRONICS CO LTD·Filed 2016·Granted Feb 27, 2018·14 cites·19 claims
- 0495US9773886B1Nanosheet and nanowire devices having doped internal spacers and methods of manufacturing the sameSAMSUNG ELECTRONICS CO LTD·Filed 2016·Granted Sep 26, 2017·14 cites·20 claims
- 0592US10566330B2Dielectric separation of partial GAA FETsSAMSUNG ELECTRONICS CO LTD·Filed 2018·Granted Feb 18, 2020·10 cites·20 claims
- 0688US9978833B2Methods for varied strain on nano-scale field effect transistor devicesSAMSUNG ELECTRONICS CO LTD·Filed 2016·Granted May 22, 2018·5 cites·18 claims
- 0785US11101320B2System and method for efficient enhancement of an on/off ratio of a bitcell based on 3T2R binary weight cell with spin orbit torque MJTs (SOT-MTJs)SAMSUNG ELECTRONICS CO LTD·Filed 2020·Granted Aug 24, 2021·1 cites·19 claims
- 0884US11552067B2Semiconductor cell blocks having non-integer multiple of cell heightsSAMSUNG ELECTRONICS CO LTD·Filed 2020·Granted Jan 10, 2023·2 cites·7 claims
- 0977US8188460B2Bi-layer pseudo-spin field-effect transistorBANERJEE SANJAY K·Filed 2009·Granted May 29, 2012·6 cites·6 claims
- 1073US2024379653A1Semiconductor cell blocks having non-integer multiple of cell heightsSAMSUNG ELECTRONICS CO LTD·Filed 2024·Application pending·0 cites
- 1170US12080703B2Semiconductor cell blocks having non-integer multiple of cell heightsSAMSUNG ELECTRONICS CO LTD·Filed 2022·Granted Sep 3, 2024·0 cites·14 claims
- 1268US9871139B2Sacrificial epitaxial gate stressorsSAMSUNG ELECTRONICS CO LTD·Filed 2016·Granted Jan 16, 2018·1 cites·20 claims
- 1366US10181527B2FinFet having dual vertical spacer and method of manufacturing the sameSAMSUNG ELECTRONICS CO LTD·Filed 2016·Granted Jan 15, 2019·1 cites·8 claims
- 1465US8263967B1Bi-layer pseudo-spin field-effect transistorBANERJEE SANJAY K·Filed 2012·Granted Sep 11, 2012·1 cites·12 claims
- 1559US11556768B2Optimization of sparsified neural network layers for semi-digital crossbar architecturesSAMSUNG ELECTRONICS CO LTD·Filed 2020·Granted Jan 17, 2023·0 cites·20 claims
- 1659US11475933B2Variation mitigation scheme for semi-digital mac array with a 2T-2 resistive memory element bitcellSAMSUNG ELECTRONICS CO LTD·Filed 2020·Granted Oct 18, 2022·0 cites·18 claims
- 1754US11182686B24T4R ternary weight cell with high on/off ratio backgroundSAMSUNG ELECTRONICS CO LTD·Filed 2019·Granted Nov 23, 2021·0 cites·20 claims
- 1848US11217392B2Composite piezoelectric capacitorSAMSUNG ELECTRONICS CO LTD·Filed 2019·Granted Jan 4, 2022·0 cites·7 claims
- 1947US10872662B22T2R binary weight cell with high on/off ratio backgroundSAMSUNG ELECTRONICS CO LTD·Filed 2019·Granted Dec 22, 2020·0 cites·20 claims
- 2045US10832774B2Variation resistant 3T3R binary weight cell with low output current and high on/off ratioSAMSUNG ELECTRONICS CO LTD·Filed 2019·Granted Nov 10, 2020·0 cites·20 claims
- 2145US9425275B2Integrated circuit chips having field effect transistors with different gate designsSAMSUNG ELECTRONICS CO LTD·Filed 2015·Granted Aug 23, 2016·0 cites·20 claims
- 2241US9431492B2Integrated circuit devices including contacts and methods of forming the sameSAMSUNG ELECTRONICS CO LTD·Filed 2015·Granted Aug 30, 2016·0 cites·20 claims
- 2340US10205025B2Methods to achieve strained channel finFET devicesSAMSUNG ELECTRONICS CO LTD·Filed 2016·Granted Feb 12, 2019·0 cites·19 claims
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Identity basis: PatentsView inventor disambiguation (2025Q4-odp release). How scoring works →