Inventor · disambiguated record
Dharmendra Saraswat
Also filed as: SARASWAT DHARMENDRA
11 granted patents·11 pending applications·201 citations·filing 2009–2025
90Inventor score
Files withAVAGO TECH INT SALES PTE LID14TYCO ELECTRONICS CORP4MCCLELLAN JUSTIN SHANE1MORGAN CHAD WILLIAM1RITTER CHRISTOPHER DAVID1
Top patents by PatentIndex Score
22 records- 0195US8308512B2Connector assemblyRITTER CHRISTOPHER DAVID·Filed 2011·Granted Nov 13, 2012·49 cites·20 claims
- 0293US8992252B2Receptacle assembly for a midplane connector systemTYCO ELECTRONICS CORP·Filed 2012·Granted Mar 31, 2015·28 cites·20 claims
- 0393US7976340B1Connector system with electromagnetic interference shieldingTYCO ELECTRONICS CORP·Filed 2010·Granted Jul 12, 2011·30 cites·21 claims
- 0491US11906802B2Photonics integration in semiconductor packagesAVAGO TECH INT SALES PTE LID·Filed 2022·Granted Feb 20, 2024·2 cites·20 claims
- 0591US8398432B1Grounding structures for header and receptacle assembliesMCCLELLAN JUSTIN SHANE·Filed 2011·Granted Mar 19, 2013·33 cites·20 claims
- 0688US8500487B2Grounding structures for header and receptacle assembliesMORGAN CHAD WILLIAM·Filed 2011·Granted Aug 6, 2013·20 cites·20 claims
- 0787US7988491B2Electrical connector having contact modulesTYCO ELECTRONICS CORP·Filed 2009·Granted Aug 2, 2011·27 cites·20 claims
- 0876US8157595B2Ground shield for an electrical connectorSARASWAT DHARMENDRA·Filed 2010·Granted Apr 17, 2012·12 cites·23 claims
- 0974US2025096108A1Cantilevered power planes to provide a return current path for high-speed signalsAVAGO TECH INT SALES PTE LID·Filed 2024·Application pending·0 cites
- 1073US2024151921A1Photonics Integration in Semiconductor PackagesAVAGO TECH INT SALES PTE LID·Filed 2024·Application pending·0 cites
- 1171US2025279341A1Multilayer Cores, Variable Width Vias, and Offset ViasAVAGO TECH INT SALES PTE LID·Filed 2025·Application pending·0 cites
- 1264US12191243B2Cantilevered power planes to provide a return current path for high-speed signalsAVAGO TECH INT SALES PTE LID·Filed 2022·Granted Jan 7, 2025·0 cites·20 claims
- 1362US2023352383A1Multilayer Cores, Variable Width Vias, and Offset ViasAVAGO TECH INT SALES PTE LID·Filed 2022·Application pending·0 cites
- 1460US12463319B2Integrated antennas on side wall of 3D stacked dieAVAGO TECH INT SALES PTE LID·Filed 2022·Granted Nov 4, 2025·0 cites·8 claims
- 1553US2024145392A1Substrate with Differing Dielectric ConstantsAVAGO TECH INT SALES PTE LID·Filed 2022·Application pending·0 cites
- 1652US2024128156A1Microfluidic Channels for Cooling Hybrid Bonded InterfacesAVAGO TECH INT SALES PTE LID·Filed 2022·Application pending·0 cites
- 1751US2024038641A1Elastomer Interconnection Substrate LayerAVAGO TECH INT SALES PTE LID·Filed 2022·Application pending·0 cites
- 1851US2024038645A1Semiconductor Package Interconnection StructureAVAGO TECH INT SALES PTE LID·Filed 2022·Application pending·0 cites
- 1951US2024038613A1Edge Seal for Bonded Stacks of Different Size Semiconductor DevicesAVAGO TECH INT SALES PTE LID·Filed 2022·Application pending·0 cites
- 2050US10971450B2Hexagonally arranged connection patterns for high-density device packagingAVAGO TECH INT SALES PTE LID·Filed 2019·Granted Apr 6, 2021·0 cites·20 claims
- 2150US2023369267A13D Packaging Heterogeneous Area Array InterconnectionsAVAGO TECH INT SALES PTE LID·Filed 2022·Application pending·0 cites
- 2238US2015064968A1Receptacle assembly having a plurality of termination pointsTYCO ELECTRONICS CORP·Filed 2013·Application pending·0 cites
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Identity basis: PatentsView inventor disambiguation (2025Q4-odp release). How scoring works →