Inventor · disambiguated record
Douglas R. Moran
Also filed as: MORAN DOUGLAS · MORAN DOUGLAS R · MORAN DOUGLAS RAYMOND
18 granted patents·249 citations·filing 1991–2016
94Inventor score
Top patents by PatentIndex Score
18 records- 0186US9092632B2Platform firmware armoring technologyINTEL CORP·Filed 2013·Granted Jul 28, 2015·8 cites·20 claims
- 0284US8522322B2Platform firmware armoring technologyWISHMAN ALLEN R·Filed 2010·Granted Aug 27, 2013·13 cites·25 claims
- 0382US7139890B2Methods and arrangements to interface memoryINTEL CORP·Filed 2002·Granted Nov 21, 2006·34 cites·14 claims
- 0479US7861024B2Providing a set aside mechanism for posted interrupt transactionsINTEL CORP·Filed 2008·Granted Dec 28, 2010·9 cites·20 claims
- 0578US9477627B2Interconnect to communicate information uni-directionallyINTEL CORP·Filed 2012·Granted Oct 25, 2016·3 cites·19 claims
- 0678US6618770B2Graphics address relocation table (GART) stored entirely in a local memory of an input/output expansion bridge for input/output (I/O) address translationINTEL CORP·Filed 2002·Granted Sep 9, 2003·24 cites·7 claims
- 0776US9690353B2System and method for initiating a reduced power mode for one or more functional blocks of a processor based on various types of mode requestINTEL CORP·Filed 2013·Granted Jun 27, 2017·5 cites·23 claims
- 0873US9152205B2Mechanism for facilitating faster suspend/resume operations in computing systemsFALIK OHAD·Filed 2012·Granted Oct 6, 2015·4 cites·28 claims
- 0972US8650427B2Activity alignment algorithm by masking traffic flowsKNOLLA WILLIAM·Filed 2011·Granted Feb 11, 2014·5 cites·19 claims
- 1069US6594756B1Multi-processor system for selecting a processor which has successfully written it's ID into write-once register after system reset as the boot-strap processorINTEL CORP·Filed 1999·Granted Jul 15, 2003·52 cites·22 claims
- 1167US9766683B2Interconnect to communicate information uni-directionallyINTEL CORP·Filed 2016·Granted Sep 19, 2017·1 cites·20 claims
- 1264US6615374B1First and next error identification for integrated circuit devicesINTEL CORP·Filed 1999·Granted Sep 2, 2003·43 cites·16 claims
- 1361US6457068B1Graphics address relocation table (GART) stored entirely in a local memory of an expansion bridge for address translationINTEL CORP·Filed 1999·Granted Sep 24, 2002·34 cites·18 claims
- 1460US6738869B1Arrangements for out-of-order queue cache coherency and memory write starvation preventionINTEL CORP·Filed 2000·Granted May 18, 2004·9 cites·16 claims
- 1545US7610611B2Prioritized address decoderMORAN DOUGLAS R·Filed 2003·Granted Oct 27, 2009·4 cites·12 claims
- 1641US8145816B2System and method for deadlock free bus protection of resources during search executionFISCHER STEPHEN A·Filed 2004·Granted Mar 27, 2012·0 cites·16 claims
- 1739US9098561B2Determining an effective stress level on a processorSHAPIRA DORIT·Filed 2011·Granted Aug 4, 2015·0 cites·17 claims
- 1828US5278800AMemory system and unique memory chip allowing island interlaceIBM·Filed 1991·Granted Jan 11, 1994·1 cites·5 claims
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Identity basis: PatentsView inventor disambiguation (2025Q4-odp release). How scoring works →