Inventor · disambiguated record
Douglas C. Morse
Also filed as: MORSE DOUGLAS · MORSE DOUGLAS C
11 granted patents·249 citations·filing 1999–2009
92Inventor score
Top patents by PatentIndex Score
11 records- 0190US6735706B2Programmable power management system and methodLATTICE SEMICONDUCTOR CORP·Filed 2000·Granted May 11, 2004·70 cites·40 claims
- 0286US6674303B1Programmable input/output cell with bidirectional and shift register capabilitiesLATTICE SEMICONDUCTOR CORP·Filed 2001·Granted Jan 6, 2004·37 cites·16 claims
- 0382US7100058B1Programmable power management system and methodLATTICE SEMICONDUCTOR CORP·Filed 2003·Granted Aug 29, 2006·33 cites·23 claims
- 0481US7111183B1Expansion method for complex power-sequencing applicationsLATTICE SEMICONDUCTOR CORP·Filed 2002·Granted Sep 19, 2006·34 cites·20 claims
- 0576US7657773B1Clock distribution chip for generating both zero-delay and non-zero-delay clock signalsLATTICE SEMICONDUCTOR CORP·Filed 2006·Granted Feb 2, 2010·7 cites·21 claims
- 0674US8122277B1Clock distribution chipCHANDRA SHYAM·Filed 2009·Granted Feb 21, 2012·6 cites·18 claims
- 0773US6605959B1Structure and method for implementing wide multiplexersLATTICE SEMICONDUCTOR CORP·Filed 2001·Granted Aug 12, 2003·18 cites·19 claims
- 0862US6628660B1Finite state machine with associated memoryLATTICE SEMICONDUCTOR CORP·Filed 1999·Granted Sep 30, 2003·30 cites·10 claims
- 0960US7017063B2Systems and methods for controlling voltage regulator module power suppliesLATTICE SEMICONDUCTOR CORP·Filed 2004·Granted Mar 21, 2006·12 cites·19 claims
- 1056US8112656B1Clock distribution chipCHANDRA SHYAM·Filed 2009·Granted Feb 7, 2012·1 cites·12 claims
- 1149US7028201B2Powering-up a device having digital and analog circuitryLATTICE SEMICONDUCTOR CORP·Filed 2004·Granted Apr 11, 2006·1 cites·20 claims
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Identity basis: PatentsView inventor disambiguation (2025Q4-odp release). How scoring works →