Inventor · disambiguated record
Duncan George Elliott
Also filed as: ELLIOTT DUNCAN · ELLIOTT DUNCAN G · ELLIOTT DUNCAN GEORGE
13 granted patents·4 pending applications·367 citations·filing 1994–2020
93Inventor score
Files withMOSAID TECHNOLOGIES INC5BREEN KRISTOPHER CHAD2VAN DEN BERG LEENDERT JAN2BRANDON TYLER L1BRANDON TYLER LEE1
Top patents by PatentIndex Score
17 records- 0184US7046522B2Method for scalable architectures in stackable three-dimensional integrated circuits and electronicsSUNG RAYMOND JIT-HUNG·Filed 2003·Granted May 16, 2006·63 cites·68 claims
- 0284US6279088B1Memory device with multiple processors having parallel access to the same memory areaMOSAID TECHNOLOGIES INC·Filed 1999·Granted Aug 21, 2001·82 cites·2 claims
- 0383US7215563B2Multi-layered memory cell structureBRANDON TYLER L·Filed 2005·Granted May 8, 2007·22 cites·36 claims
- 0482US6560684B2Method and apparatus for an energy efficient operation of multiple processors in a memoryMOSAID TECHNOLOGIES INC·Filed 2001·Granted May 6, 2003·25 cites·18 claims
- 0582US5956274AMemory device with multiple processors having parallel access to the same memory areaMOSAID TECHNOLOGIES INC·Filed 1996·Granted Sep 21, 1999·76 cites·43 claims
- 0681US7155581B2Method and apparatus for an energy efficient operation of multiple processors in a memoryMOSAID TECHNOLOGIES INC·Filed 2003·Granted Dec 26, 2006·22 cites·22 claims
- 0774US8502317B2Level shifter circuits for integrated circuitsVAN DEN BERG LEENDERT JAN·Filed 2010·Granted Aug 6, 2013·6 cites·12 claims
- 0873US5546343AMethod and apparatus for a single instruction operating multiple processors on a memory chipFiled 1994·Granted Aug 13, 1996·45 cites·18 claims
- 0963US6556469B2System and method for multilevel DRAM sensing and restoringFiled 2001·Granted Apr 29, 2003·15 cites·8 claims
- 1059US8462574B2Memory sensing with secondary bufferBREEN KRISTOPHER CHAD·Filed 2011·Granted Jun 11, 2013·2 cites·15 claims
- 1150US8027212B2Method and apparatus for a dynamic semiconductor memory with compact sense amplifier circuitBREEN KRISTOPHER CHAD·Filed 2007·Granted Sep 27, 2011·2 cites·2 claims
- 1250US7123056B2Clock logic domino circuits for high-speed and energy efficient microprocessor pipelinesMOSAID TECHNOLOGIES INC·Filed 2003·Granted Oct 17, 2006·5 cites·7 claims
- 1347US7936192B2Alias-locked loop frequency synthesizer using a regenerative sampling latchVAN DEN BERG LEENDERT JAN·Filed 2009·Granted May 3, 2011·2 cites·16 claims
- 1446US2010200781A1Method and apparatus for manipulating and detecting analytesKHORASANI MAZIYAR·Filed 2010·Application pending·0 cites
- 1535US2009285035A1Pipelined wordline memory architectureBRANDON TYLER LEE·Filed 2009·Application pending·0 cites
- 1634US2020373927A1Differential Alias-Locked LoopLiang Jinghang·Filed 2020·Application pending·0 cites
- 1732US2005081093A1Ternary content addressable memory directed associative redundancy for semiconductor memoriesFiled 2004·Application pending·0 cites
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Identity basis: PatentsView inventor disambiguation (2025Q4-odp release). How scoring works →