Inventor · disambiguated record
Dwight K. Elvey
Also filed as: ELVEY DWIGHT · ELVEY DWIGHT K
8 granted patents·115 citations·filing 1982–2013
84Inventor score
Files withADVANCED MICRO DEVICES INC4ELVEY DWIGHT K1FUJITSU LTD1GILLESPIE KEVIN M1STORAGE TECHNOLOGY PARTNERS1
Top patents by PatentIndex Score
8 records- 0189US7685487B1Simultaneous core testing in multi-core integrated circuitsADVANCED MICRO DEVICES INC·Filed 2005·Granted Mar 23, 2010·31 cites·30 claims
- 0285US4504783ATest fixture for providing electrical access to each I/O pin of a VLSI chip having a large number of I/O pinsSTORAGE TECHNOLOGY PARTNERS·Filed 1982·Granted Mar 12, 1985·54 cites·9 claims
- 0376US6636997B1System and method for improving LBIST test coverageFUJITSU LTD·Filed 2000·Granted Oct 21, 2003·26 cites·25 claims
- 0470US10310015B2Method and apparatus for providing clock signals for a scan chainADVANCED MICRO DEVICES INC·Filed 2013·Granted Jun 4, 2019·2 cites·22 claims
- 0552US9000806B2Preventing A-B-A race in a latch-based deviceADVANCED MICRO DEVICES INC·Filed 2013·Granted Apr 7, 2015·1 cites·20 claims
- 0650US7817761B2Test techniques for a delay-locked loop receiver interfaceADVANCED MICRO DEVICES INC·Filed 2007·Granted Oct 19, 2010·1 cites·28 claims
- 0741US8850278B2Fault tolerant scannable glitch latchGILLESPIE KEVIN M·Filed 2010·Granted Sep 30, 2014·0 cites·21 claims
- 0836US8461874B2Preventing A-B-A race in a latch-based deviceELVEY DWIGHT K·Filed 2011·Granted Jun 11, 2013·0 cites·20 claims
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Identity basis: PatentsView inventor disambiguation (2025Q4-odp release). How scoring works →