Inventor · disambiguated record
Dwight P. Manley
Also filed as: MANLEY DWIGHT · MANLEY DWIGHT P
15 granted patents·2 pending applications·993 citations·filing 1987–2024
95Inventor score
Top patents by PatentIndex Score
17 records- 0197US11093277B2Systems, methods, and apparatuses for heterogeneous computingINTEL CORP·Filed 2020·Granted Aug 17, 2021·6 cites·25 claims
- 0296US11693691B2Systems, methods, and apparatuses for heterogeneous computingINTEL CORP·Filed 2021·Granted Jul 4, 2023·4 cites·11 claims
- 0396US5142634ABranch predictionDIGITAL EQUIPMENT CORP·Filed 1989·Granted Aug 25, 1992·276 cites·47 claims
- 0493US4888679AMethod and apparatus using a cache and main memory for both vector processing and scalar processing by prefetching cache blocks including vector data elementsDIGITAL EQUIPMENT CORP·Filed 1988·Granted Dec 19, 1989·151 cites·31 claims
- 0591US11416281B2Systems, methods, and apparatuses for heterogeneous computingINTEL CORP·Filed 2016·Granted Aug 16, 2022·4 cites·28 claims
- 0690US12135981B2Systems, methods, and apparatuses for heterogeneous computingINTEL CORP·Filed 2023·Granted Nov 5, 2024·1 cites·20 claims
- 0790US4985825ASystem for delaying processing of memory access exceptions until the execution stage of an instruction pipeline of a virtual memory system based digital computerDIGITAL EQUIPMENT CORP·Filed 1989·Granted Jan 15, 1991·128 cites·11 claims
- 0888US5222223AMethod and apparatus for ordering and queueing multiple memory requestsDIGITAL EQUIPMENT CORP·Filed 1989·Granted Jun 22, 1993·100 cites·9 claims
- 0982US2025123881A1Systems, methods, and apparatuses for heterogeneous computingINTEL CORP·Filed 2024·Application pending·0 cites
- 1080US5168573AMemory device for storing vector registersDIGITAL EQUIPMENT CORP·Filed 1989·Granted Dec 1, 1992·41 cites·11 claims
- 1180US5113515AVirtual instruction cache system using length responsive decoded instruction shifting and merging with prefetch buffer outputs to fill instruction bufferDIGITAL EQUIPMENT CORP·Filed 1989·Granted May 12, 1992·67 cites·9 claims
- 1274US5142631ASystem for queuing individual read or write mask and generating respective composite mask for controlling access to general purpose registerDIGITAL EQUIPMENT CORP·Filed 1989·Granted Aug 25, 1992·54 cites·27 claims
- 1369US4949250AMethod and apparatus for executing instructions for a vector processing systemDIGITAL EQUIPMENT CORP·Filed 1988·Granted Aug 14, 1990·40 cites·13 claims
- 1468US5349651ASystem for translation of virtual to physical addresses by operating memory management processor for calculating location of physical address in memory concurrently with cache comparing virtual addresses for translationDIGITAL EQUIPMENT CORP·Filed 1991·Granted Sep 20, 1994·51 cites·16 claims
- 1568US4980817AVector register system for executing plural read/write commands concurrently and independently routing data to plural read/write portsDIGITAL EQUIPMENT·Filed 1987·Granted Dec 25, 1990·42 cites·19 claims
- 1658US5019965AMethod and apparatus for increasing the data storage rate of a computer system having a predefined data path widthDIGITAL EQUIPMENT CORP·Filed 1989·Granted May 28, 1991·28 cites·10 claims
- 1743US2006026584A1Explicit linking of dynamic link librariesMURATORI RICHARD D·Filed 2004·Application pending·0 cites
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Identity basis: PatentsView inventor disambiguation (2025Q4-odp release). How scoring works →