Inventor · disambiguated record
Edwin Frank Barry
Also filed as: BARRY EDWIN F · BARRY EDWIN FRANK
39 granted patents·1 pending application·1,382 citations·filing 1997–2011
98Inventor score
Files withPTS CORP20BOPS INC13BILLIONS OF OPERATIONS PER SEC5PECHANEK GERALD G1PECHANEK GERALD GEORGE1
Top patents by PatentIndex Score
40 records- 0195US6173389B1Methods and apparatus for dynamic very long instruction word sub-instruction selection for execution time parallelism in an indirect very long instruction word processorBILLIONS OF OPERATIONS PER SEC·Filed 1998·Granted Jan 9, 2001·207 cites·22 claims
- 0292US6397324B1Accessing tables in memory banks using load and store address generators sharing store read port of compute register file separated from address register fileBOPS INC·Filed 2000·Granted May 28, 2002·79 cites·34 claims
- 0391US6366999B1Methods and apparatus to support conditional execution in a VLIW-based array processor with subword executionBOPS INC·Filed 1999·Granted Apr 2, 2002·130 cites·9 claims
- 0491US6167502AMethod and apparatus for manifold array processingBILLIONS OF OPERATIONS PER SEC·Filed 1997·Granted Dec 26, 2000·148 cites·34 claims
- 0589US6769056B2Methods and apparatus for manifold array processingPTS CORP·Filed 2002·Granted Jul 27, 2004·42 cites·30 claims
- 0688US6865663B2Control processor dynamically loading shadow instruction register associated with memory entry of coprocessor in flexible coupling modePTS CORP·Filed 2001·Granted Mar 8, 2005·42 cites·17 claims
- 0787US6321322B1Methods and apparatus for scalable instruction set architecture with dynamic compact instructionsBOPS INC·Filed 2000·Granted Nov 20, 2001·35 cites·20 claims
- 0887US6216223B1Methods and apparatus to dynamically reconfigure the instruction pipeline of an indirect very long instruction word scalable processorBILLIONS OF OPERATIONS PER SEC·Filed 1999·Granted Apr 10, 2001·122 cites·29 claims
- 0986US6760831B2Methods and apparatus to support conditional execution in a VLIW-based array processor with subword executionPTS CORP·Filed 2002·Granted Jul 6, 2004·29 cites·20 claims
- 1086US6622234B1Methods and apparatus for initiating and resynchronizing multi-cycle SIMD instructionsPTS CORP·Filed 2000·Granted Sep 16, 2003·37 cites·15 claims
- 1186US6467036B1Methods and apparatus for dynamic very long instruction word sub-instruction selection for execution time parallelism in an indirect very long instruction word processorBOPS INC·Filed 2000·Granted Oct 15, 2002·34 cites·24 claims
- 1286US6457073B2Methods and apparatus for providing data transfer controlBOPS INC·Filed 2001·Granted Sep 24, 2002·25 cites·39 claims
- 1385US6954842B2Methods and apparatus to support conditional execution in a VLIW-based array processor with subword executionPTS CORP·Filed 2003·Granted Oct 11, 2005·28 cites·25 claims
- 1484US6842811B2Methods and apparatus for scalable array processor interrupt detection and responsePTS CORP·Filed 2001·Granted Jan 11, 2005·24 cites·22 claims
- 1584US6470441B1Methods and apparatus for manifold array processingBOPS INC·Filed 2000·Granted Oct 22, 2002·32 cites·7 claims
- 1684US6430677B2Methods and apparatus for dynamic instruction controlled reconfigurable register file with extended precisionBOPS INC·Filed 2001·Granted Aug 6, 2002·30 cites·16 claims
- 1782US6101592AMethods and apparatus for scalable instruction set architecture with dynamic compact instructionsBILLIONS OF OPERATIONS PER SEC·Filed 1998·Granted Aug 8, 2000·71 cites·12 claims
- 1880US7010668B2Methods and apparatus to support conditional execution in a VLIW-based array processor with subword executionPTS CORP·Filed 2003·Granted Mar 7, 2006·24 cites·18 claims
- 1979US6944683B2Methods and apparatus for providing data transfer controlPTS CORP·Filed 2004·Granted Sep 13, 2005·15 cites·10 claims
- 2078US6795909B2Methods and apparatus for ManArray PE-PE switch controlPTS CORP·Filed 2002·Granted Sep 21, 2004·20 cites·20 claims
- 2175US7017029B2Coprocessor instruction loading from port register based on interrupt vector table indicationPTS CORP·Filed 2005·Granted Mar 21, 2006·5 cites·18 claims
- 2272US6453367B2Methods and apparatus for providing direct memory access controlBOPS INC·Filed 2001·Granted Sep 17, 2002·12 cites·17 claims
- 2371US6581152B2Methods and apparatus for instruction addressing in indirect VLIW processorsBOPS INC·Filed 2002·Granted Jun 17, 2003·14 cites·9 claims
- 2470US8117357B2System core for transferring data between an external device and memoryPECHANEK GERALD GEORGE·Filed 2011·Granted Feb 14, 2012·1 cites·20 claims
- 2569US6868490B1Methods and apparatus for providing context switching between software tasks with reconfigurable controlPTS CORP·Filed 2000·Granted Mar 15, 2005·12 cites·11 claims
- 2668US6721822B2Methods and apparatus for providing data transfer controlPTS CORP·Filed 2002·Granted Apr 13, 2004·6 cites·9 claims
- 2768US6704857B2Methods and apparatus for loading a very long instruction word memoryPTS CORP·Filed 2000·Granted Mar 9, 2004·11 cites·13 claims
- 2867US6260082B1Methods and apparatus for providing data transfer controlBOPS INC·Filed 1999·Granted Jul 10, 2001·27 cites·3 claims
- 2966US6748517B1Constructing database representing manifold array architecture instruction set for use in support tool code creationPTS CORP·Filed 2000·Granted Jun 8, 2004·7 cites·18 claims
- 3066US6167501AMethods and apparatus for manarray PE-PE switch controlBILLIONS OF OPERATIONS PER SEC·Filed 1998·Granted Dec 26, 2000·44 cites·22 claims
- 3164US6883088B1Methods and apparatus for loading a very long instruction word memoryPTS CORP·Filed 2004·Granted Apr 19, 2005·8 cites·15 claims
- 3262US6834295B2Methods and apparatus for providing bit-reversal and multicast functions utilizing DMA controllerPTS CORP·Filed 2001·Granted Dec 21, 2004·4 cites·22 claims
- 3361US7962667B2System core for transferring data between an external device and memoryPECHANEK GERALD G·Filed 2007·Granted Jun 14, 2011·1 cites·21 claims
- 3461US6366997B1Methods and apparatus for manarray PE-PE switch controlBOPS INC·Filed 2000·Granted Apr 2, 2002·5 cites·6 claims
- 3559US6654870B1Methods and apparatus for establishing port priority functions in a VLIW processorPTS CORP·Filed 2000·Granted Nov 25, 2003·5 cites·46 claims
- 3657US7024540B2Methods and apparatus for establishing port priority functions in a VLIW processorPTS CORP·Filed 2003·Granted Apr 4, 2006·4 cites·12 claims
- 3757US6343356B1Methods and apparatus for dynamic instruction controlled reconfiguration register file with extended precisionBOPS INC·Filed 1998·Granted Jan 29, 2002·24 cites·21 claims
- 3853US6986020B2Methods and apparatus for providing bit-reversal and multicast functions utilizing DMA controllerPTS CORP·Filed 2004·Granted Jan 10, 2006·1 cites·8 claims
- 3952US6256683B1Methods and apparatus for providing direct memory access controlBOPS INC·Filed 1999·Granted Jul 3, 2001·17 cites·22 claims
- 4050US2005289259A1Methods and apparatus for providing bit-reversal and multicast functions utilizing DMA controllerPTS CORP·Filed 2005·Application pending·0 cites
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Identity basis: PatentsView inventor disambiguation (2025Q4-odp release). How scoring works →