Inventor · disambiguated record
Edward Chang
Also filed as: CHANG EDWARD · CHANG EDWARD C · CHANG EDWARD C M · CHANG EDWARD Y
11 granted patents·6 pending applications·89 citations·filing 1996–2021
88Inventor score
Files withADVANCED MICRO DEVICES INC3CHANG EDWARD C2HEWLETT PACKARD DEVELOPMENT CO2JUNIPER NETWORKS INC2DVORAK JOSEF A1
Top patents by PatentIndex Score
17 records- 0194US10231325B1Placement of vias in printed circuit board circuitsJUNIPER NETWORKS INC·Filed 2016·Granted Mar 12, 2019·22 cites·9 claims
- 0288US11960339B2Multi-die stacked power deliveryADVANCED MICRO DEVICES INC·Filed 2021·Granted Apr 16, 2024·2 cites·17 claims
- 0382US10383213B1Placement of vias in printed circuit board circuitsJUNIPER NETWORKS INC·Filed 2019·Granted Aug 13, 2019·3 cites·15 claims
- 0477US11233510B2In memory logic functions using memory arraysADVANCED MICRO DEVICES INC·Filed 2018·Granted Jan 25, 2022·2 cites·20 claims
- 0568US5954831AMethod for testing a memory deviceECTS INC·Filed 1997·Granted Sep 21, 1999·33 cites·6 claims
- 0658US7609096B1Frequency synthesizer and method for constructing the sameCHANG EDWARD C·Filed 2008·Granted Oct 27, 2009·6 cites·25 claims
- 0754US8461902B2Multiplexer circuit with load balanced fanout characteristicsDVORAK JOSEF A·Filed 2011·Granted Jun 11, 2013·2 cites·19 claims
- 0853US6664813B2Pseudo-NMOS logic having a feedback controllerHEWLETT PACKARD DEVELOPMENT CO·Filed 2002·Granted Dec 16, 2003·6 cites·6 claims
- 0952US12107076B2Through-silicon via layout for multi-die integrated circuitsADVANCED MICRO DEVICES INC·Filed 2021·Granted Oct 1, 2024·0 cites·20 claims
- 1043US7349448B2Distributed multiplexing circuit with built-in repeaterHEWLETT PACKARD DEVELOPMENT CO·Filed 2003·Granted Mar 25, 2008·0 cites·21 claims
- 1139US5691956AMemory with fast decodingFiled 1996·Granted Nov 25, 1997·13 cites·24 claims
- 1238US2002124259A1Client-based interactive digital television architectureFiled 2001·Application pending·0 cites
- 1333US2003204803A1Method and apparatus for improving observability of signals internal to VLSI chipsFiled 2002·Application pending·0 cites
- 1431US2004095162A1Pseudo-NMOS logic having a feedback controllerFiled 2003·Application pending·0 cites
- 1523US2007192661A1Automatic Test Equipment (ATE) Realized Through Sharing Same Memory Space by Instruction Data and Vector DataCHANG EDWARD C·Filed 2006·Application pending·0 cites
- 1622US2002085907A1Self-aligning and floating apparatus for an automatic testerFiled 2001·Application pending·0 cites
- 1722US2002077763A1Automatic tester having separate coarse and precise timing modulesFiled 2000·Application pending·0 cites
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Identity basis: PatentsView inventor disambiguation (2025Q4-odp release). How scoring works →