Inventor · disambiguated record
Edwin M. Fulcher
Also filed as: FULCHER EDWIN · FULCHER EDWIN M · FULCHER EDWIN MAXWELL
15 granted patents·1,173 citations·filing 1974–2003
95Inventor score
Top patents by PatentIndex Score
15 records- 0196US5686764AFlip chip package with reduced number of package layersLSI LOGIC CORP·Filed 1996·Granted Nov 11, 1997·292 cites·18 claims
- 0295US5729894AMethod of assembling ball bump grid array semiconductor packagesLSI LOGIC CORP·Filed 1996·Granted Mar 24, 1998·230 cites·12 claims
- 0395US5311060AHeat sink for semiconductor device assemblyLSI LOGIC CORP·Filed 1992·Granted May 10, 1994·189 cites·26 claims
- 0492US4004133ACredit card containing electronic circuitRCA CORP·Filed 1974·Granted Jan 18, 1977·84 cites·13 claims
- 0591US5648661AIntegrated circuit wafer comprising unsingulated dies, and decoder arrangement for individually testing the diesLSI LOGIC CORP·Filed 1994·Granted Jul 15, 1997·134 cites·10 claims
- 0686US6008534AIntegrated circuit package having signal traces interposed between power and ground conductors in order to form stripline transmission linesLSI LOGIC CORP·Filed 1998·Granted Dec 28, 1999·92 cites·24 claims
- 0785US6762366B1Ball assignment for ball grid array packageLSI LOGIC CORP·Filed 2001·Granted Jul 13, 2004·39 cites·18 claims
- 0884US6671865B1High density input outputLSI LOGIC CORP·Filed 2001·Granted Dec 30, 2003·41 cites·20 claims
- 0973US6798035B1Bonding pad for low k dielectricLSI LOGIC CORP·Filed 2003·Granted Sep 28, 2004·20 cites·20 claims
- 1073US6744130B1Isolated stripline structureLSI LOGIC CORP·Filed 2003·Granted Jun 1, 2004·18 cites·20 claims
- 1163US6459049B1High density signal routingLSI LOGIC CORP·Filed 2001·Granted Oct 1, 2002·14 cites·16 claims
- 1258US6791177B1Integrated circuit packaging that uses guard conductors to isolate noise-sensitive signals within the package substrateLSI LOGIC CORP·Filed 2003·Granted Sep 14, 2004·8 cites·19 claims
- 1357US6963129B1Multi-chip package having a contiguous heat spreader assemblyLSI LOGIC CORP·Filed 2003·Granted Nov 8, 2005·8 cites·6 claims
- 1450US6828643B2Bonding pads over input circuitsLSI LOGIC CORP·Filed 2002·Granted Dec 7, 2004·4 cites·6 claims
- 1537US6867488B2Thick metal top layerLSI LOGIC CORP·Filed 2002·Granted Mar 15, 2005·0 cites·20 claims
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Identity basis: PatentsView inventor disambiguation (2025Q4-odp release). How scoring works →