Inventor · disambiguated record
Edward W. Seibert
Also filed as: SEIBERT EDWARD W
7 granted patents·117 citations·filing 1995–2012
84Inventor score
Technology areasG06F
Top patents by PatentIndex Score
7 records- 0180US6430729B1Process and system for maintaining 3 sigma process tolerance for parasitic extraction with on-the-fly biasingIBM·Filed 2000·Granted Aug 6, 2002·34 cites·27 claims
- 0272US8191030B2Identifying parasitic diode(s) in an integrated circuit physical designKEMERER DOUGLAS W·Filed 2008·Granted May 29, 2012·5 cites·19 claims
- 0372US5761080AMethod and apparatus for modeling capacitance in an integrated circuitIBM·Filed 1995·Granted Jun 2, 1998·68 cites·41 claims
- 0455US6519752B1Method of performing parasitic extraction for a multi-fingered transistorIBM·Filed 2000·Granted Feb 11, 2003·6 cites·26 claims
- 0554US6473887B1Inclusion of global wires in capacitance extractionIBM·Filed 2000·Granted Oct 29, 2002·4 cites·21 claims
- 0649US8756554B2Identifying parasitic diode(s) in an integrated circuit physical designKEMERER DOUGLAS W·Filed 2012·Granted Jun 17, 2014·0 cites·19 claims
- 0749US7490303B2Identifying parasitic diode(s) in an integrated circuit physical designIBM·Filed 2006·Granted Feb 10, 2009·0 cites·3 claims
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Identity basis: PatentsView inventor disambiguation (2025Q4-odp release). How scoring works →