Inventor · disambiguated record
Elliott Delaye
Also filed as: DELAYE ELLIOTT
35 granted patents·2 pending applications·446 citations·filing 2005–2024
97Inventor score
Top patents by PatentIndex Score
37 records- 0198US7428722B2Versatile multiplexer-structures in programmable logic using serial chaining and novel selection schemesCSWITCH CORP·Filed 2008·Granted Sep 23, 2008·58 cites·8 claims
- 0297US10515135B1Data format suitable for fast massively parallel general matrix multiplication in a programmable ICXILINX INC·Filed 2017·Granted Dec 24, 2019·25 cites·20 claims
- 0397US10354733B1Software-defined memory bandwidth reduction by hierarchical stream buffering for general matrix multiplication in a programmable ICXILINX INC·Filed 2017·Granted Jul 16, 2019·40 cites·20 claims
- 0496US10572225B1Circuit arrangements and methods for performing multiply-and-accumulate operationsXILINX INC·Filed 2018·Granted Feb 25, 2020·26 cites·20 claims
- 0595US10460416B1Inline image preprocessing for convolution operations using a matrix multiplier on an integrated circuitXILINX INC·Filed 2017·Granted Oct 29, 2019·19 cites·17 claims
- 0695US7358765B2Dedicated logic cells employing configurable logic and dedicated logic functionsCSWITCH CORP·Filed 2005·Granted Apr 15, 2008·29 cites·12 claims
- 0795US7358761B1Versatile multiplexer-structures in programmable logic using serial chaining and novel selection schemesCSITCH CORP·Filed 2005·Granted Apr 15, 2008·59 cites·23 claims
- 0895US7176717B2Programmable logic and routing blocks with dedicated linesVELOGIX INC·Filed 2005·Granted Feb 13, 2007·59 cites·15 claims
- 0994US11204747B1Re-targetable interface for data exchange between heterogeneous systems and accelerator abstraction into software instructionsXILINX INC·Filed 2017·Granted Dec 21, 2021·19 cites·20 claims
- 1092US10411709B1Circuit arrangements and methods for dividing a three-dimensional input feature mapXILINX INC·Filed 2018·Granted Sep 10, 2019·13 cites·20 claims
- 1190US10943039B1Software-driven design optimization for fixed-point multiply-accumulate circuitryXILINX INC·Filed 2017·Granted Mar 9, 2021·11 cites·20 claims
- 1290US10678509B1Software-driven design optimization for mapping between floating-point and fixed-point multiply accumulatorsXILINX INC·Filed 2018·Granted Jun 9, 2020·11 cites·20 claims
- 1388US11222256B2Neural network processing system having multiple processors and a neural network acceleratorXILINX INC·Filed 2017·Granted Jan 11, 2022·8 cites·15 claims
- 1487US11106968B1Circuit arrangements and methods for traversing input feature mapsXILINX INC·Filed 2018·Granted Aug 31, 2021·7 cites·20 claims
- 1587US11036827B1Software-defined buffer/transposer for general matrix multiplication in a programmable ICXILINX INC·Filed 2017·Granted Jun 15, 2021·7 cites·20 claims
- 1685US12086572B1Software defined neural network layer pipeliningXILINX INC·Filed 2017·Granted Sep 10, 2024·6 cites·17 claims
- 1785US10303833B1Parallelizing timing-based operations for circuit designsXILINX INC·Filed 2017·Granted May 28, 2019·6 cites·20 claims
- 1883US11568218B2Neural network processing system having host controlled kernel accleratorsXILINX INC·Filed 2017·Granted Jan 31, 2023·5 cites·20 claims
- 1981US10984500B1Inline image preprocessing for convolution operations using a matrix multiplier on an integrated circuitXILINX INC·Filed 2019·Granted Apr 20, 2021·3 cites·20 claims
- 2080US11429848B2Host-directed multi-layer neural network processing via per-layer work requestsXILINX INC·Filed 2017·Granted Aug 30, 2022·4 cites·14 claims
- 2176US11620490B2Multi-layer neural network processing by a neural network accelerator using host communicated merged weights and a package of per-layer instructionsXILINX INC·Filed 2017·Granted Apr 4, 2023·3 cites·14 claims
- 2276US11386644B2Image preprocessing for generalized image processingXILINX INC·Filed 2017·Granted Jul 12, 2022·2 cites·17 claims
- 2376US9268891B1Compact and efficient circuit implementation of dynamic ranges in hardware description languagesXILINX INC·Filed 2014·Granted Feb 23, 2016·3 cites·20 claims
- 2476US7439768B2Dedicated logic cells employing configurable logic and dedicated logic functionsCSWITCH CORP·Filed 2006·Granted Oct 21, 2008·6 cites·10 claims
- 2576US7414431B2Dedicated logic cells employing configurable logic and dedicated logic functionsCSWITCH CORP·Filed 2006·Granted Aug 19, 2008·6 cites·12 claims
- 2673US9460253B1Selecting predefined circuit implementations in a circuit design systemXILINX INC·Filed 2014·Granted Oct 4, 2016·3 cites·19 claims
- 2773US9235498B1Circuits for and methods of enabling the modification of an input data streamXILINX INC·Filed 2013·Granted Jan 12, 2016·5 cites·20 claims
- 2862US12511460B2Hardware acceleration of machine learning designsXILINX INC·Filed 2022·Granted Dec 30, 2025·0 cites·20 claims
- 2962US12079158B2Reconfigurable neural engine with extensible instruction set architectureXILINX INC·Filed 2022·Granted Sep 3, 2024·0 cites·20 claims
- 3061US8938700B1Data-driven pattern matching in synthesis of circuit designsXILINX INC·Filed 2013·Granted Jan 20, 2015·1 cites·20 claims
- 3159US12147379B2Scalable acceleration of reentrant compute operationsXILINX INC·Filed 2022·Granted Nov 19, 2024·0 cites·20 claims
- 3259US7836113B2Dedicated logic cells employing configurable logic and dedicated logic functionsAGATE LOGIC INC·Filed 2006·Granted Nov 16, 2010·2 cites·15 claims
- 3358US2025190221A1Systems and methods for parallelization of embedding operationsADVANCED MICRO DEVICES INC·Filed 2024·Application pending·0 cites
- 3456US2024069511A1Instruction generation and programming model for a data processing array and microcontrollerXILINX INC·Filed 2022·Application pending·0 cites
- 3552US12248786B2Instruction set architecture for data processing array controlXILINX INC·Filed 2022·Granted Mar 11, 2025·0 cites·20 claims
- 3647US11694066B2Machine learning runtime library for neural network accelerationXILINX INC·Filed 2017·Granted Jul 4, 2023·0 cites·20 claims
- 3744US12061990B2Static block scheduling in massively parallel software defined hardware systemsXILINX INC·Filed 2017·Granted Aug 13, 2024·0 cites·17 claims
Join the waitlist — get patent alerts
Get an alert when Elliott Delaye files or is granted a new patent.
We store only your email — no account needed. See our privacy policy.
Identity basis: PatentsView inventor disambiguation (2025Q4-odp release). How scoring works →