Inventor · disambiguated record
Eliezer Weissmann
Also filed as: WEISSMANN ELIEZER
160 granted patents·25 pending applications·699 citations·filing 2004–2024
99Inventor score
Top patents by PatentIndex Score
185 records- 0196US8230120B2PCI express enhancements and extensionsAJANOVIC JASMIN·Filed 2011·Granted Jul 24, 2012·21 cites·28 claims
- 0295US11645080B2Apparatuses, methods, and systems for instructions to request a history reset of a processor coreINTEL CORP·Filed 2022·Granted May 9, 2023·3 cites·28 claims
- 0395US8769316B2Dynamically allocating a power budget over multiple domains of a processorANANTHAKRISHNAN AVINASH N·Filed 2011·Granted Jul 1, 2014·20 cites·17 claims
- 0494US11966742B2Apparatuses, methods, and systems for instructions to request a history reset of a processor coreINTEL CORP·Filed 2023·Granted Apr 23, 2024·2 cites·20 claims
- 0594US11687139B2Multi-level CPU high current protectionINTEL CORP·Filed 2022·Granted Jun 27, 2023·2 cites·20 claims
- 0694US11436018B2Apparatuses, methods, and systems for instructions to request a history reset of a processor coreINTEL CORP·Filed 2020·Granted Sep 6, 2022·4 cites·25 claims
- 0794US11301298B2Apparatus and method for dynamic control of microprocessor configurationINTEL CORP·Filed 2020·Granted Apr 12, 2022·5 cites·24 claims
- 0894US10705588B2Enabling a non-core domain to control memory bandwidth in a processorINTEL CORP·Filed 2019·Granted Jul 7, 2020·5 cites·20 claims
- 0994US8775833B2Dynamically allocating a power budget over multiple domains of a processorINTEL CORP·Filed 2013·Granted Jul 8, 2014·13 cites·18 claims
- 1094US8230119B2PCI express enhancements and extensionsAJANOVIC JASMIN·Filed 2010·Granted Jul 24, 2012·14 cites·3 claims
- 1194US8099523B2PCI express enhancements and extensions including transactions having prefetch parametersAJANOVIC JASMIN·Filed 2011·Granted Jan 17, 2012·16 cites·4 claims
- 1294US7451333B2Coordinating idle state transitions in multi-core processorsINTEL CORP·Filed 2004·Granted Nov 11, 2008·94 cites·29 claims
- 1393US11899599B2Apparatuses, methods, and systems for hardware control of processor performance levelsINTEL CORP·Filed 2021·Granted Feb 13, 2024·2 cites·21 claims
- 1493US7899943B2PCI express enhancements and extensionsINTEL CORP·Filed 2007·Granted Mar 1, 2011·16 cites·23 claims
- 1592US9158693B2Dynamically controlling cache size to maximize energy efficiencyANANTHAKRISHNAN AVINASH N·Filed 2011·Granted Oct 13, 2015·14 cites·11 claims
- 1692US8073981B2PCI express enhancements and extensionsAJANOVIC JASMIN·Filed 2007·Granted Dec 6, 2011·14 cites·12 claims
- 1792US7966511B2Power management coordination in multi-core processorsINTEL CORP·Filed 2004·Granted Jun 21, 2011·73 cites·38 claims
- 1891US10324519B2Controlling forced idle state operation in a processorINTEL CORP·Filed 2016·Granted Jun 18, 2019·7 cites·14 claims
- 1991US10216246B2Multi-level loops for computer processor controlINTEL CORP·Filed 2016·Granted Feb 26, 2019·6 cites·20 claims
- 2091US10067553B2Dynamically controlling cache size to maximize energy efficiencyINTEL CORP·Filed 2016·Granted Sep 4, 2018·5 cites·13 claims
- 2191US9361116B2Apparatus and method for low-latency invocation of acceleratorsINTEL CORP·Filed 2012·Granted Jun 7, 2016·13 cites·22 claims
- 2291US8549183B2PCI express enhancements and extensionsAJANOVIC JASMIN·Filed 2010·Granted Oct 1, 2013·8 cites·22 claims
- 2391US8447888B2PCI express enhancements and extensionsAJANOVIC JASMIN·Filed 2011·Granted May 21, 2013·8 cites·15 claims
- 2491US7930566B2PCI express enhancements and extensionsINTEL CORP·Filed 2007·Granted Apr 19, 2011·13 cites·17 claims
- 2590US9471490B2Dynamically controlling cache size to maximize energy efficiencyINTEL CORP·Filed 2015·Granted Oct 18, 2016·5 cites·20 claims
- 2690US8555101B2PCI express enhancements and extensionsAJANOVIC JASMIN·Filed 2011·Granted Oct 8, 2013·7 cites·10 claims
- 2789US11481013B2Multi-level loops for computer processor controlINTEL CORP·Filed 2020·Granted Oct 25, 2022·2 cites·9 claims
- 2889US10372198B2Controlling performance states of processing engines of a processorINTEL CORP·Filed 2017·Granted Aug 6, 2019·6 cites·17 claims
- 2989US8473642B2PCI express enhancements and extensions including device window cachingAJANOVIC JASMIN·Filed 2011·Granted Jun 25, 2013·6 cites·12 claims
- 3088US10429919B2System, apparatus and method for loose lock-step redundancy power managementINTEL CORP·Filed 2017·Granted Oct 1, 2019·3 cites·20 claims
- 3188US9720730B2Providing an asymmetric multicore processor system transparently to an operating systemGINZBURG BORIS·Filed 2011·Granted Aug 1, 2017·15 cites·20 claims
- 3288US9396020B2Context switching mechanism for a processing core having a general purpose CPU core and a tightly coupled acceleratorGINZBURG BORIS·Filed 2012·Granted Jul 19, 2016·10 cites·11 claims
- 3388US9032103B2Transaction re-orderingINTEL CORP·Filed 2012·Granted May 12, 2015·5 cites·27 claims
- 3488US9026682B2Prefectching in PCI expressINTEL CORP·Filed 2012·Granted May 5, 2015·5 cites·35 claims
- 3588US8793404B2Atomic operationsAJANOVIC JASMIN·Filed 2012·Granted Jul 29, 2014·5 cites·6 claims
- 3688US8726048B2Power management coordination in multi-core processorsNAVEH ALON·Filed 2011·Granted May 13, 2014·8 cites·33 claims
- 3787US10095521B2Apparatus and method for low-latency invocation of acceleratorsINTEL CORP·Filed 2016·Granted Oct 9, 2018·4 cites·10 claims
- 3887US10078519B2Apparatus and method for accelerating operations in a processor which uses shared virtual memoryINTEL CORP·Filed 2016·Granted Sep 18, 2018·4 cites·3 claims
- 3987US9098415B2PCI express transaction descriptorINTEL CORP·Filed 2012·Granted Aug 4, 2015·4 cites·39 claims
- 4087US8799687B2Method, apparatus, and system for energy efficiency and energy conservation including optimizing C-state selection under variable wakeup ratesNAVEH ALON·Filed 2011·Granted Aug 5, 2014·9 cites·20 claims
- 4187US8458498B2Method and apparatus of power management of processorROTEM EFRAIM·Filed 2008·Granted Jun 4, 2013·14 cites·22 claims
- 4286US10990161B2Processor having accelerated user responsiveness in constrained environmentINTEL CORP·Filed 2019·Granted Apr 27, 2021·2 cites·20 claims
- 4386US10379904B2Controlling a performance state of a processor using a combination of package and thread hint informationINTEL CORP·Filed 2016·Granted Aug 13, 2019·6 cites·19 claims
- 4486US10372197B2User level control of power management policiesINTEL CORP·Filed 2016·Granted Aug 6, 2019·3 cites·20 claims
- 4586US10120691B2Context switching mechanism for a processor having a general purpose core and a tightly coupled acceleratorINTEL CORP·Filed 2016·Granted Nov 6, 2018·4 cites·20 claims
- 4685US10379596B2Providing an interface for demotion control information in a processorINTEL CORP·Filed 2016·Granted Aug 13, 2019·5 cites·18 claims
- 4785US9092210B2Controlling current transients in a processorROTEM EFRAIM·Filed 2011·Granted Jul 28, 2015·9 cites·17 claims
- 4884US9760160B2Controlling performance states of processing engines of a processorINTEL CORP·Filed 2015·Granted Sep 12, 2017·4 cites·22 claims
- 4984US9442739B2Collaborative processor and system performance and power managementTHERIEN GUY M·Filed 2011·Granted Sep 13, 2016·4 cites·10 claims
- 5084US9348401B2Mapping a performance request to an operating frequency in a processorINTEL CORP·Filed 2013·Granted May 24, 2016·6 cites·18 claims
Showing the top 50 of 185 patent records by PatentIndex Score.
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Identity basis: PatentsView inventor disambiguation (2025Q4-odp release). How scoring works →